Message ID | 1490263352-61174-6-git-send-email-beilei.xing@intel.com (mailing list archive) |
---|---|
State | Superseded, archived |
Delegated to: | Ferruh Yigit |
Headers |
Checks
Context | Check | Description |
---|---|---|
ci/checkpatch | success | coding style OK |
ci/Intel-compilation | fail | Compilation issues |
Commit Message
diff --git a/doc/guides/rel_notes/release_17_05.rst b/doc/guides/rel_notes/release_17_05.rst index 3e48224..f17e03b 100644 --- a/doc/guides/rel_notes/release_17_05.rst +++ b/doc/guides/rel_notes/release_17_05.rst @@ -85,6 +85,10 @@ New Features Data Ring, ability to register memory regions. +* **Added pipeline personalization profile support for i40e.** + + * Added loading pipeline personalization profile to i40e FW. + Resolved Issues ---------------