[dpdk-dev] cxgbe: report 100G link speed capability for Chelsio T6 adapters

Message ID 1498120900-22325-1-git-send-email-martin.weiser@allegro-packets.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation success Compilation OK

Commit Message

Martin Weiser June 22, 2017, 8:41 a.m. UTC
  These adapters support 100G link speed but the speed_capa bitmask in the
device info did not reflect that.

Signed-off-by: Martin Weiser <martin.weiser@allegro-packets.com>
---
 drivers/net/cxgbe/cxgbe_ethdev.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
  

Patch

diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c
index b622d25..4981be4 100644
--- a/drivers/net/cxgbe/cxgbe_ethdev.c
+++ b/drivers/net/cxgbe/cxgbe_ethdev.c
@@ -175,7 +175,11 @@  static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
 
 	device_info->rx_desc_lim = cxgbe_desc_lim;
 	device_info->tx_desc_lim = cxgbe_desc_lim;
-	device_info->speed_capa = ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G;
+	if (CHELSIO_CHIP_VERSION(adapter->params.chip) == CHELSIO_T6) {
+		device_info->speed_capa = ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G;
+	} else {
+		device_info->speed_capa = ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G;
+	}
 }
 
 static void cxgbe_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)