From patchwork Tue Sep 12 09:31:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anatoly Burakov X-Patchwork-Id: 28611 X-Patchwork-Delegate: pablo.de.lara.guarch@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1607F199B4; Tue, 12 Sep 2017 11:31:27 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 68AAE1D8A for ; Tue, 12 Sep 2017 11:31:22 +0200 (CEST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Sep 2017 02:31:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,382,1500966000"; d="scan'208";a="148204758" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga005.jf.intel.com with ESMTP; 12 Sep 2017 02:31:19 -0700 Received: from sivswdev01.ir.intel.com (sivswdev01.ir.intel.com [10.237.217.45]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id v8C9VIGf004573; Tue, 12 Sep 2017 10:31:18 +0100 Received: from sivswdev01.ir.intel.com (localhost [127.0.0.1]) by sivswdev01.ir.intel.com with ESMTP id v8C9VIET030056; Tue, 12 Sep 2017 10:31:18 +0100 Received: (from aburakov@localhost) by sivswdev01.ir.intel.com with LOCAL id v8C9VIwG030052; Tue, 12 Sep 2017 10:31:18 +0100 From: Anatoly Burakov To: dev@dpdk.org Cc: fiona.trahe@intel.com, john.griffin@intel.com, deepak.k.jain@intel.com, pablo.de.lara.guarch@intel.com Date: Tue, 12 Sep 2017 10:31:16 +0100 Message-Id: X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <7ebf9384e20ea6fde085044c505e19719d041d25.1503651900.git.anatoly.burakov@intel.com> References: <7ebf9384e20ea6fde085044c505e19719d041d25.1503651900.git.anatoly.burakov@intel.com> In-Reply-To: References: Subject: [dpdk-dev] [PATCH v2 1/3] crypto/qat: remove atomics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Replacing atomics in the QAT driver with simple 16-bit integers for number of inflight packets. This adds a new limitation to the QAT driver: each queue pair is now explicitly single-threaded. Signed-off-by: Anatoly Burakov Acked-by: Fiona Trahe --- v2: fixed commit message fixed documentation doc/guides/cryptodevs/qat.rst | 1 + doc/guides/rel_notes/release_17_11.rst | 6 ++++++ drivers/crypto/qat/qat_crypto.c | 12 +++++------- drivers/crypto/qat/qat_crypto.h | 2 +- drivers/crypto/qat/qat_qp.c | 4 ++-- 5 files changed, 15 insertions(+), 10 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index a3fce7b..cb17b6b 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -90,6 +90,7 @@ Limitations * No BSD support as BSD QAT kernel driver not available. * ZUC EEA3/EIA3 is not supported by dh895xcc devices * Maximum additional authenticated data (AAD) for GCM is 240 bytes long. +* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported). Installation diff --git a/doc/guides/rel_notes/release_17_11.rst b/doc/guides/rel_notes/release_17_11.rst index 170f4f9..96f954f 100644 --- a/doc/guides/rel_notes/release_17_11.rst +++ b/doc/guides/rel_notes/release_17_11.rst @@ -41,6 +41,12 @@ New Features Also, make sure to start the actual text at the margin. ========================================================= +* **Updated QAT crypto PMD.** + + Performance enhancements: + + * Removed atomics from the internal queue pair structure. + Resolved Issues --------------- diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c index 62ee175..bb199ae 100644 --- a/drivers/crypto/qat/qat_crypto.c +++ b/drivers/crypto/qat/qat_crypto.c @@ -51,7 +51,6 @@ #include #include #include -#include #include #include #include @@ -945,10 +944,10 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops, tail = queue->tail; /* Find how many can actually fit on the ring */ - overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops) - - queue->max_inflights; + tmp_qp->inflights16 += nb_ops; + overflow = tmp_qp->inflights16 - queue->max_inflights; if (overflow > 0) { - rte_atomic16_sub(&tmp_qp->inflights16, overflow); + tmp_qp->inflights16 -= overflow; nb_ops_possible = nb_ops - overflow; if (nb_ops_possible == 0) return 0; @@ -963,8 +962,7 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops, * This message cannot be enqueued, * decrease number of ops that wasn't sent */ - rte_atomic16_sub(&tmp_qp->inflights16, - nb_ops_possible - nb_ops_sent); + tmp_qp->inflights16 -= nb_ops_possible - nb_ops_sent; if (nb_ops_sent == 0) return 0; goto kick_tail; @@ -1036,7 +1034,7 @@ qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops, WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr, queue->hw_bundle_number, queue->hw_queue_number, queue->head); - rte_atomic16_sub(&tmp_qp->inflights16, msg_counter); + tmp_qp->inflights16 -= msg_counter; tmp_qp->stats.dequeued_count += msg_counter; } return msg_counter; diff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_crypto.h index 3f35a00..7773b57 100644 --- a/drivers/crypto/qat/qat_crypto.h +++ b/drivers/crypto/qat/qat_crypto.h @@ -77,7 +77,7 @@ struct qat_queue { struct qat_qp { void *mmap_bar_addr; - rte_atomic16_t inflights16; + uint16_t inflights16; struct qat_queue tx_q; struct qat_queue rx_q; struct rte_cryptodev_stats stats; diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c index 5048d21..e98bffe 100644 --- a/drivers/crypto/qat/qat_qp.c +++ b/drivers/crypto/qat/qat_qp.c @@ -186,7 +186,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id, RTE_CACHE_LINE_SIZE); qp->mmap_bar_addr = pci_dev->mem_resource[0].addr; - rte_atomic16_init(&qp->inflights16); + qp->inflights16 = 0; if (qat_tx_queue_create(dev, &(qp->tx_q), queue_pair_id, qp_conf->nb_descriptors, socket_id) != 0) { @@ -269,7 +269,7 @@ int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id) } /* Don't free memory if there are still responses to be processed */ - if (rte_atomic16_read(&(qp->inflights16)) == 0) { + if (qp->inflights16 == 0) { qat_queue_delete(&(qp->tx_q)); qat_queue_delete(&(qp->rx_q)); } else {