From patchwork Tue Sep 12 09:31:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Burakov, Anatoly" X-Patchwork-Id: 28613 X-Patchwork-Delegate: pablo.de.lara.guarch@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C36511B199; Tue, 12 Sep 2017 11:31:29 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 2317D1D8A for ; Tue, 12 Sep 2017 11:31:24 +0200 (CEST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Sep 2017 02:31:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,382,1500966000"; d="scan'208";a="148204760" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga005.jf.intel.com with ESMTP; 12 Sep 2017 02:31:19 -0700 Received: from sivswdev01.ir.intel.com (sivswdev01.ir.intel.com [10.237.217.45]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id v8C9VIlA004576; Tue, 12 Sep 2017 10:31:19 +0100 Received: from sivswdev01.ir.intel.com (localhost [127.0.0.1]) by sivswdev01.ir.intel.com with ESMTP id v8C9VIoV030063; Tue, 12 Sep 2017 10:31:18 +0100 Received: (from aburakov@localhost) by sivswdev01.ir.intel.com with LOCAL id v8C9VIEj030059; Tue, 12 Sep 2017 10:31:18 +0100 From: Anatoly Burakov To: dev@dpdk.org Cc: fiona.trahe@intel.com, john.griffin@intel.com, deepak.k.jain@intel.com, pablo.de.lara.guarch@intel.com Date: Tue, 12 Sep 2017 10:31:17 +0100 Message-Id: X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <7ebf9384e20ea6fde085044c505e19719d041d25.1503651900.git.anatoly.burakov@intel.com> References: <7ebf9384e20ea6fde085044c505e19719d041d25.1503651900.git.anatoly.burakov@intel.com> In-Reply-To: References: Subject: [dpdk-dev] [PATCH v2 2/3] crypto/qat: enable RX head writes coalescing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Don't write CSR head until we processed enough RX descriptors. Also delay marking them as free until we are writing CSR head. Signed-off-by: Anatoly Burakov Acked-by: Fiona Trahe --- v2: fixed commit message doc/guides/rel_notes/release_17_11.rst | 1 + drivers/crypto/qat/qat_crypto.c | 49 ++++++++++++++++++++++++++-------- drivers/crypto/qat/qat_crypto.h | 6 +++++ 3 files changed, 45 insertions(+), 11 deletions(-) diff --git a/doc/guides/rel_notes/release_17_11.rst b/doc/guides/rel_notes/release_17_11.rst index 96f954f..0b77095 100644 --- a/doc/guides/rel_notes/release_17_11.rst +++ b/doc/guides/rel_notes/release_17_11.rst @@ -46,6 +46,7 @@ New Features Performance enhancements: * Removed atomics from the internal queue pair structure. + * Coalesce writes to HEAD CSR on response processing. Resolved Issues diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c index bb199ae..1656e0f 100644 --- a/drivers/crypto/qat/qat_crypto.c +++ b/drivers/crypto/qat/qat_crypto.c @@ -980,6 +980,33 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops, return nb_ops_sent; } +static inline +void rxq_free_desc(struct qat_qp *qp, struct qat_queue *q) +{ + uint32_t old_head, new_head; + uint32_t max_head; + + old_head = q->csr_head; + new_head = q->head; + max_head = qp->nb_descriptors * q->msg_size; + + /* write out free descriptors */ + void *cur_desc = (uint8_t *)q->base_addr + old_head; + + if (new_head < old_head) { + memset(cur_desc, ADF_RING_EMPTY_SIG, max_head - old_head); + memset(q->base_addr, ADF_RING_EMPTY_SIG, new_head); + } else { + memset(cur_desc, ADF_RING_EMPTY_SIG, new_head - old_head); + } + q->nb_processed_responses = 0; + q->csr_head = new_head; + + /* write current head to CSR */ + WRITE_CSR_RING_HEAD(qp->mmap_bar_addr, q->hw_bundle_number, + q->hw_queue_number, new_head); +} + uint16_t qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops, uint16_t nb_ops) @@ -989,10 +1016,12 @@ qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops, uint32_t msg_counter = 0; struct rte_crypto_op *rx_op; struct icp_qat_fw_comn_resp *resp_msg; + uint32_t head; queue = &(tmp_qp->rx_q); + head = queue->head; resp_msg = (struct icp_qat_fw_comn_resp *) - ((uint8_t *)queue->base_addr + queue->head); + ((uint8_t *)queue->base_addr + head); while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG && msg_counter != nb_ops) { @@ -1019,23 +1048,21 @@ qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops, rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS; } - *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG; - queue->head = adf_modulo(queue->head + - queue->msg_size, - ADF_RING_SIZE_MODULO(queue->queue_size)); + head = adf_modulo(head + queue->msg_size, queue->modulo); resp_msg = (struct icp_qat_fw_comn_resp *) - ((uint8_t *)queue->base_addr + - queue->head); + ((uint8_t *)queue->base_addr + head); *ops = rx_op; ops++; msg_counter++; } if (msg_counter > 0) { - WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr, - queue->hw_bundle_number, - queue->hw_queue_number, queue->head); - tmp_qp->inflights16 -= msg_counter; + queue->head = head; tmp_qp->stats.dequeued_count += msg_counter; + queue->nb_processed_responses += msg_counter; + tmp_qp->inflights16 -= msg_counter; + + if (queue->nb_processed_responses > QAT_CSR_HEAD_WRITE_THRESH) + rxq_free_desc(tmp_qp, queue); } return msg_counter; } diff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_crypto.h index 7773b57..d78957c 100644 --- a/drivers/crypto/qat/qat_crypto.h +++ b/drivers/crypto/qat/qat_crypto.h @@ -50,6 +50,9 @@ (((num) + (align) - 1) & ~((align) - 1)) #define QAT_64_BTYE_ALIGN_MASK (~0x3f) +#define QAT_CSR_HEAD_WRITE_THRESH 32U +/* number of requests to accumulate before writing head CSR */ + struct qat_session; enum qat_device_gen { @@ -73,6 +76,9 @@ struct qat_queue { uint8_t hw_bundle_number; uint8_t hw_queue_number; /* HW queue aka ring offset on bundle */ + uint32_t csr_head; /* last written head value */ + uint16_t nb_processed_responses; + /* number of responses processed since last CSR head write */ }; struct qat_qp {