[dpdk-dev] [PATCH 10/12] Add cache size define for IBM Power Architecture
Chao CH Zhu
bjzhuc at cn.ibm.com
Mon Sep 29 08:40:59 CEST 2014
Hi,Hemant,
Actually, the set of patches is only for IBM Power7/8 which has difference
cache line size. Of cause, a better way may be detecting the cache line
size at runtime not from configuration files... May be we can submit this
kind of patch later.
Best Regards!
------------------------------
Chao Zhu (祝超)
Research Staff Member
Cloud Infrastructure and Technology Group
IBM China Research Lab
Building 19 Zhongguancun Software Park
8 Dongbeiwang West Road, Haidian District,
Beijing, PRC. 100193
Tel: +86-10-58748711
Email: bjzhuc at cn.ibm.com
From: "Hemant at freescale.com" <Hemant at freescale.com>
To: Chao CH Zhu/China/IBM at IBMCN, "dev at dpdk.org" <dev at dpdk.org>
Date: 2014/09/29 14:20
Subject: RE: [dpdk-dev] [PATCH 10/12] Add cache size define for IBM
Power Architecture
> --- a/mk/arch/powerpc/rte.vars.mk
> +++ b/mk/arch/powerpc/rte.vars.mk
> @@ -32,7 +32,7 @@
> ARCH ?= powerpc
> CROSS ?=
>
> -CPU_CFLAGS ?= -m64
> +CPU_CFLAGS ?= -m64 -DCACHE_LINE_SIZE=128
[hemant] Instead of hardcoding the CACHE_LINE_SIZE, can you drive the
CACHE_LINE_SIZE from config file. Other powerpc processor have it as 64.
> CPU_LDFLAGS ?=
> CPU_ASFLAGS ?= -felf64
>
> --
> 1.7.1
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