[dpdk-dev] [PATCH v2] e1000: fix ieee1588 timestamp issue

[Wenzhuo Lu]

Ieee1588 reads system time to set its timestamp. On 1G NICs, for example,
i350, system time is disabled by default. It means the ieee1588 timestamp
will always be 0.
This patch enables system time when ieee1588 is enabled.

v2 changes:
* move the macro to the top of the file with the other timesync defines.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu at intel.com>
---
 drivers/net/e1000/igb_ethdev.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 56734a3..b2f57c4 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -82,6 +82,7 @@
 #define E1000_TIMINCA_INCVALUE 16000000
 #define E1000_TIMINCA_INIT     ((0x02 << E1000_TIMINCA_16NS_SHIFT) \
 				| E1000_TIMINCA_INCVALUE)
+#define E1000_TSAUXC_DISABLE_SYSTIME 0x80000000
 
 static int  eth_igb_configure(struct rte_eth_dev *dev);
 static int  eth_igb_start(struct rte_eth_dev *dev);
@@ -3903,6 +3904,12 @@ igb_timesync_enable(struct rte_eth_dev *dev)
 {
 	struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	uint32_t tsync_ctl;
+	uint32_t tsauxc;
+
+	/* Enable system time for it isn't on by default. */
+	tsauxc = E1000_READ_REG(hw, E1000_TSAUXC);
+	tsauxc &= ~E1000_TSAUXC_DISABLE_SYSTIME;
+	E1000_WRITE_REG(hw, E1000_TSAUXC, tsauxc);
 
 	/* Start incrementing the register used to timestamp PTP packets. */
 	E1000_WRITE_REG(hw, E1000_TIMINCA, E1000_TIMINCA_INIT);
-- 
1.9.3