[dpdk-dev] [PATCH 1/4] pci: allow access to PCI config space

Bruce Richardson bruce.richardson at intel.com
Tue May 12 11:56:25 CEST 2015


On Mon, May 11, 2015 at 10:31:04AM -0700, Stephen Hemminger wrote:
> On Mon, 11 May 2015 12:54:54 +0000
> Neil Horman <nhorman at tuxdriver.com> wrote:
> 
> > On Thu, May 07, 2015 at 04:25:32PM -0700, Stephen Hemminger wrote:
> > > From: Stephen Hemminger <shemming at brocade.com>
> > > 
> > > Some drivers need ability to access PCI config (for example for power
> > > management). This adds an abstraction to do this; only implemented
> > > on Linux, but should be possible on BSD.
> > > 
> 
> Could someone who has BSD infrastructure try this, not sure if it will even
> build.

No, it doesn't. :-)
Version that compiles is below. However, I haven't tried testing it yet or
anything. Is there any easy way for me to do so?

/Bruce

diff --git a/lib/librte_eal/bsdapp/eal/eal_pci.c b/lib/librte_eal/bsdapp/eal/eal_pci.c
index 61e8921..4194199 100644
--- a/lib/librte_eal/bsdapp/eal/eal_pci.c
+++ b/lib/librte_eal/bsdapp/eal/eal_pci.c
@@ -490,6 +490,87 @@ rte_eal_pci_probe_one_driver(struct rte_pci_driver *dr, struct rte_pci_device *d
        return 1;
 }

+/* Read PCI config space. */
+int rte_eal_pci_read_config(const struct rte_pci_device *dev,
+                           void *buf, size_t len, off_t offset)
+{
+       int fd = -1;
+
+       struct pci_io pi = {
+               .pi_sel = {
+                       .pc_domain = dev->addr.domain,
+                       .pc_bus = dev->addr.bus,
+                       .pc_dev = dev->addr.devid,
+                       .pc_func = dev->addr.function,
+               },
+               .pi_reg = offset,
+               .pi_width = len,
+       };
+
+       if (len == 3 || len > sizeof(pi.pi_data)) {
+               RTE_LOG(ERR, EAL, "%s(): invalid pci read length\n", __func__);
+               goto error;
+       }
+
+       fd = open("/dev/pci", O_RDONLY);
+       if (fd < 0) {
+               RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
+               goto error;
+       }
+
+       if (ioctl(fd, PCIOCREAD, &pi) < 0)
+               goto error;
+       close(fd);
+
+       memcpy(buf, &pi.pi_data, len);
+       return 0;
+
+error:
+       if (fd >= 0)
+               close(fd);
+       return -1;
+}
+
+/* Write PCI config space. */
+int rte_eal_pci_write_config(const struct rte_pci_device *dev,
+                            const void *buf, size_t len, off_t offset)
+{
+       int fd = -1;
+
+       struct pci_io pi = {
+               .pi_sel = {
+                       .pc_domain = dev->addr.domain,
+                       .pc_bus = dev->addr.bus,
+                       .pc_dev = dev->addr.devid,
+                       .pc_func = dev->addr.function,
+               },
+               .pi_reg = offset,
+               .pi_data = *(u_int32_t *)buf,
+               .pi_width = len,
+       };
+
+       if (len == 3 || len > sizeof(pi.pi_data)) {
+               RTE_LOG(ERR, EAL, "%s(): invalid pci read length\n", __func__);
+               goto error;
+       }
+
+       fd = open("/dev/pci", O_RDONLY);
+       if (fd < 0) {
+               RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
+               goto error;
+       }
+
+       if (ioctl(fd, PCIOCWRITE, &pi) < 0)
+               goto error;
+       close(fd);
+       return 0;
+
+error:
+       if (fd >= 0)
+               close(fd);
+       return -1;
+}
+
 /* Init the PCI EAL subsystem */
 int
 rte_eal_pci_init(void)




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