[dpdk-dev] [PATCH 17/32] net/dpaa2: dpbp based mempool hw offload driver

Ferruh Yigit ferruh.yigit at intel.com
Tue Dec 6 20:49:24 CET 2016


On 12/4/2016 6:17 PM, Hemant Agrawal wrote:
> DPBP represent a buffer pool instance in DPAA2-QBMAN
> HW accelerator.
> 
> All buffers needs to be programmed in the HW accelerator.
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal at nxp.com>
> ---
>  config/defconfig_arm64-dpaa2-linuxapp-gcc |   5 +
>  drivers/net/dpaa2/Makefile                |   2 +
>  drivers/net/dpaa2/base/dpaa2_hw_dpbp.c    | 366 ++++++++++++++++++++++++++++++
>  drivers/net/dpaa2/base/dpaa2_hw_dpbp.h    | 101 +++++++++
>  drivers/net/dpaa2/base/dpaa2_hw_pvt.h     |   7 +
>  drivers/net/dpaa2/dpaa2_vfio.c            |  13 +-
>  6 files changed, 493 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/net/dpaa2/base/dpaa2_hw_dpbp.c
>  create mode 100644 drivers/net/dpaa2/base/dpaa2_hw_dpbp.h
> 
> diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
> index 5ff884b..bcb6e88 100644
> --- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
> +++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
> @@ -42,6 +42,11 @@ CONFIG_RTE_ARCH_ARM_TUNE="cortex-a57+fp+simd"
>  CONFIG_RTE_MAX_LCORE=8
>  CONFIG_RTE_MAX_NUMA_NODES=1
>  
> +CONFIG_RTE_PKTMBUF_HEADROOM=256

Some comment to explain why default value overwritten can be good.

> +# FSL DPAA2 based hw mempool
> +#
> +CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2"
> +
>  # Compile software PMD backed by NXP DPAA2 files
>  #
>  CONFIG_RTE_LIBRTE_DPAA2_PMD=y
> diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
> index b04c3d2..c4981b2 100644
> --- a/drivers/net/dpaa2/Makefile
> +++ b/drivers/net/dpaa2/Makefile
> @@ -56,6 +56,8 @@ EXPORT_MAP := rte_pmd_dpaa2_version.map
>  LIBABIVER := 1
>  
>  SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += base/dpaa2_hw_dpio.c
> +SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += base/dpaa2_hw_dpbp.c
> +
>  SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_vfio.c
>  # Interfaces with DPDK
>  SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_bus.c
> diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpbp.c b/drivers/net/dpaa2/base/dpaa2_hw_dpbp.c
> new file mode 100644
> index 0000000..2b30036
> --- /dev/null
> +++ b/drivers/net/dpaa2/base/dpaa2_hw_dpbp.c
> @@ -0,0 +1,366 @@
> +/*-
> + *   BSD LICENSE
> + *
> + *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
> + *   Copyright (c) 2016 NXP. All rights reserved.
> + *
> + *   Redistribution and use in source and binary forms, with or without
> + *   modification, are permitted provided that the following conditions
> + *   are met:
> + *
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in
> + *       the documentation and/or other materials provided with the
> + *       distribution.
> + *     * Neither the name of Freescale Semiconductor, Inc nor the names of its
> + *       contributors may be used to endorse or promote products derived
> + *       from this software without specific prior written permission.
> + *
> + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include <unistd.h>
> +#include <stdio.h>
> +#include <sys/types.h>
> +#include <string.h>
> +#include <stdlib.h>
> +#include <fcntl.h>
> +#include <errno.h>
> +
> +#include <rte_mbuf.h>
> +#include <rte_ethdev.h>
> +#include <rte_malloc.h>
> +#include <rte_memcpy.h>
> +#include <rte_string_fns.h>
> +#include <rte_cycles.h>
> +#include <rte_kvargs.h>
> +#include <rte_dev.h>
> +#include <rte_ethdev.h>
> +
> +#include "dpaa2_logs.h"
> +#include <base/dpaa2_hw_pvt.h>
> +#include <base/dpaa2_hw_dpio.h>
> +#include <base/dpaa2_hw_dpbp.h>
> +#include <fsl_dpbp.h>
> +
> +static struct dpbp_node *g_dpbp_list;
> +static struct dpbp_node *avail_dpbp;
> +
> +struct dpaa2_bp_info bpid_info[MAX_BPID];
> +
> +struct dpaa2_bp_list *h_bp_list;
> +
> +int
> +dpaa2_create_dpbp_device(
> +		int dpbp_id)
> +{
> +	struct dpbp_node *dpbp_node;
> +	int ret;
> +
> +	/* Allocate DPAA2 dpbp handle */
> +	dpbp_node = (struct dpbp_node *)malloc(sizeof(struct dpbp_node));
> +	if (!dpbp_node) {
> +		PMD_INIT_LOG(ERR, "Memory allocation failed for DPBP Device");
> +		return -1;
> +	}
> +
> +	/* Open the dpbp object */
> +	dpbp_node->dpbp.regs = mcp_ptr_list[MC_PORTAL_INDEX];
> +	ret = dpbp_open(&dpbp_node->dpbp,
> +			CMD_PRI_LOW, dpbp_id, &dpbp_node->token);
> +	if (ret) {
> +		PMD_INIT_LOG(ERR, "Resource alloc failure with err code: %d",
> +			     ret);
> +		free(dpbp_node);
> +		return -1;
> +	}
> +
> +	/* Clean the device first */
> +	ret = dpbp_reset(&dpbp_node->dpbp, CMD_PRI_LOW, dpbp_node->token);
> +	if (ret) {
> +		PMD_INIT_LOG(ERR, "Failure cleaning dpbp device with"
> +					" error code %d\n", ret);
> +		return -1;
> +	}
> +
> +	dpbp_node->dpbp_id = dpbp_id;
> +	/* Add the dpbp handle into the global list */
> +	dpbp_node->next = g_dpbp_list;
> +	g_dpbp_list = dpbp_node;
> +	avail_dpbp = g_dpbp_list;
> +
> +	PMD_INIT_LOG(DEBUG, "Buffer pool resource initialized %d", dpbp_id);
> +
> +	return 0;
> +}
> +
> +static int
> +hw_mbuf_create_pool(struct rte_mempool *mp)
> +{
> +	struct dpaa2_bp_list *bp_list;
> +	struct dpbp_attr dpbp_attr;
> +	uint32_t bpid;
> +	int ret;
> +
> +	if (!avail_dpbp) {
> +		PMD_DRV_LOG(ERR, "DPAA2 resources not available");
> +		return -1;
> +	}
> +
> +	ret = dpbp_enable(&avail_dpbp->dpbp, CMD_PRI_LOW, avail_dpbp->token);
> +	if (ret != 0) {
> +		PMD_INIT_LOG(ERR, "Resource enable failure with"
> +			" err code: %d\n", ret);
> +		return -1;
> +	}
> +
> +	ret = dpbp_get_attributes(&avail_dpbp->dpbp, CMD_PRI_LOW,
> +				  avail_dpbp->token, &dpbp_attr);
> +	if (ret != 0) {
> +		PMD_INIT_LOG(ERR, "Resource read failure with"
> +			     " err code: %d\n", ret);
> +		ret = dpbp_disable(&avail_dpbp->dpbp, CMD_PRI_LOW,
> +				   avail_dpbp->token);
> +		return -1;
> +	}
> +
> +	/* Allocate the bp_list which will be added into global_bp_list */
> +	bp_list = (struct dpaa2_bp_list *)malloc(sizeof(struct dpaa2_bp_list));
> +	if (!bp_list) {
> +		PMD_INIT_LOG(ERR, "No heap memory available");
> +		return -1;
> +	}
> +
> +	/* Set parameters of buffer pool list */
> +	bp_list->buf_pool.num_bufs = mp->size;
> +	bp_list->buf_pool.size = mp->elt_size
> +			- sizeof(struct rte_mbuf) - rte_pktmbuf_priv_size(mp);
> +	bp_list->buf_pool.bpid = dpbp_attr.bpid;
> +	bp_list->buf_pool.h_bpool_mem = NULL;
> +	bp_list->buf_pool.mp = mp;
> +	bp_list->buf_pool.dpbp_node = avail_dpbp;
> +	bp_list->next = h_bp_list;
> +
> +	bpid = dpbp_attr.bpid;
> +
> +	/* Increment the available DPBP */
> +	avail_dpbp = avail_dpbp->next;
> +
> +	bpid_info[bpid].meta_data_size = sizeof(struct rte_mbuf)
> +				+ rte_pktmbuf_priv_size(mp);
> +	bpid_info[bpid].bp_list = bp_list;
> +	bpid_info[bpid].bpid = bpid;
> +
> +	mp->pool_data = (void *)&bpid_info[bpid];
> +
> +	PMD_INIT_LOG(DEBUG, "BP List created for bpid =%d", dpbp_attr.bpid);
> +
> +	h_bp_list = bp_list;
> +	/* Identification for our offloaded pool_data structure
> +	 */
> +	mp->flags |= MEMPOOL_F_HW_PKT_POOL;
> +	return 0;
> +}
> +
> +static void
> +hw_mbuf_free_pool(struct rte_mempool *mp __rte_unused)
> +{
> +	/* TODO:
> +	 * 1. Release bp_list memory allocation
> +	 * 2. opposite of dpbp_enable()
> +	 * <More>
> +	 */
> +	struct dpaa2_bp_list *bp;
> +
> +	/* Iterate over h_bp_list linked list and release each element */
> +	while (h_bp_list) {
> +		bp = h_bp_list;
> +		h_bp_list = bp->next;
> +
> +		/* TODO: Should be changed to rte_free */
> +		free(bp);
> +	}
> +}
> +
> +static
> +void dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,
> +			void * const *obj_table,
> +			uint32_t bpid,
> +			uint32_t meta_data_size,
> +			int count)
> +{
> +	struct qbman_release_desc releasedesc;
> +	struct qbman_swp *swp;
> +	int ret;
> +	int i, n;
> +	uint64_t bufs[DPAA2_MBUF_MAX_ACQ_REL];
> +
> +	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
> +		ret = dpaa2_affine_qbman_swp();
> +		if (ret != 0) {
> +			RTE_LOG(ERR, PMD, "Failed to allocate IO portal");
> +			return;
> +		}
> +	}
> +	swp = DPAA2_PER_LCORE_PORTAL;
> +
> +	/* Create a release descriptor required for releasing
> +	 * buffers into QBMAN
> +	 */
> +	qbman_release_desc_clear(&releasedesc);
> +	qbman_release_desc_set_bpid(&releasedesc, bpid);
> +
> +	n = count % DPAA2_MBUF_MAX_ACQ_REL;
> +
> +	/* convert mbuf to buffers  for the remainder*/
> +	for (i = 0; i < n ; i++) {
> +#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
> +		bufs[i] = (uint64_t)rte_mempool_virt2phy(pool, obj_table[i])
> +				+ meta_data_size;
> +#else
> +		bufs[i] = (uint64_t)obj_table[i] + meta_data_size;
> +#endif
> +	}
> +	/* feed them to bman*/
> +	do {
> +		ret = qbman_swp_release(swp, &releasedesc, bufs, n);
> +	} while (ret == -EBUSY);
> +
> +	/* if there are more buffers to free */
> +	while (n < count) {
> +		/* convert mbuf to buffers */
> +		for (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++) {
> +#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA

As far as I can see this config option not added yet, it can be good to
add with this release.

> +			bufs[i] = (uint64_t)
> +				rte_mempool_virt2phy(pool, obj_table[n + i])
> +					+ meta_data_size;
> +#else
> +			bufs[i] = (uint64_t)obj_table[n + i] + meta_data_size;
> +#endif
> +		}
> +
> +		do {
> +			ret = qbman_swp_release(swp, &releasedesc, bufs,
> +						DPAA2_MBUF_MAX_ACQ_REL);
> +			} while (ret == -EBUSY);
> +		n += DPAA2_MBUF_MAX_ACQ_REL;
> +	}
> +}
> +
> +int hw_mbuf_alloc_bulk(struct rte_mempool *pool,
> +		       void **obj_table, unsigned count)
> +{
> +#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER
> +	static int alloc;
> +#endif
> +	struct qbman_swp *swp;
> +	uint32_t mbuf_size;
> +	uint16_t bpid;
> +	uint64_t bufs[DPAA2_MBUF_MAX_ACQ_REL];
> +	int i, ret;
> +	unsigned n = 0;
> +	struct dpaa2_bp_info *bp_info;
> +
> +	bp_info = mempool_to_bpinfo(pool);
> +
> +	if (!(bp_info->bp_list)) {
> +		RTE_LOG(ERR, PMD, "DPAA2 buffer pool not configured\n");
> +		return -2;
> +	}
> +
> +	bpid = bp_info->bpid;
> +
> +	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
> +		ret = dpaa2_affine_qbman_swp();
> +		if (ret != 0) {
> +			RTE_LOG(ERR, PMD, "Failed to allocate IO portal");
> +			return -1;
> +		}
> +	}
> +	swp = DPAA2_PER_LCORE_PORTAL;
> +
> +	mbuf_size = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(pool);
> +
> +	while (n < count) {
> +		/* Acquire is all-or-nothing, so we drain in 7s,
> +		 * then the remainder.
> +		 */
> +		if ((count - n) > DPAA2_MBUF_MAX_ACQ_REL) {
> +			ret = qbman_swp_acquire(swp, bpid, bufs,
> +						DPAA2_MBUF_MAX_ACQ_REL);
> +		} else {
> +			ret = qbman_swp_acquire(swp, bpid, bufs,
> +						count - n);
> +		}
> +		/* In case of less than requested number of buffers available
> +		 * in pool, qbman_swp_acquire returns 0
> +		 */
> +		if (ret <= 0) {
> +			PMD_TX_LOG(ERR, "Buffer acquire failed with"
> +				   " err code: %d", ret);
> +			/* The API expect the exact number of requested bufs */
> +			/* Releasing all buffers allocated */
> +			dpaa2_mbuf_release(pool, obj_table, bpid,
> +					   bp_info->meta_data_size, n);
> +			return -1;
> +		}
> +		/* assigning mbuf from the acquired objects */
> +		for (i = 0; (i < ret) && bufs[i]; i++) {
> +			/* TODO-errata - observed that bufs may be null
> +			 * i.e. first buffer is valid,
> +			 * remaining 6 buffers may be null
> +			 */
> +			obj_table[n] = (struct rte_mbuf *)(bufs[i] - mbuf_size);
> +			rte_mbuf_refcnt_set((struct rte_mbuf *)obj_table[n], 0);
> +			PMD_TX_LOG(DEBUG, "Acquired %p address %p from BMAN",
> +				   (void *)bufs[i], (void *)obj_table[n]);
> +			n++;
> +		}
> +	}
> +
> +#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER
> +	alloc += n;
> +	PMD_TX_LOG(DEBUG, "Total = %d , req = %d done = %d",
> +		   alloc, count, n);
> +#endif
> +	return 0;
> +}
> +
> +static int
> +hw_mbuf_free_bulk(struct rte_mempool *pool,
> +		  void * const *obj_table, unsigned n)
> +{
> +	struct dpaa2_bp_info *bp_info;
> +
> +	bp_info = mempool_to_bpinfo(pool);
> +	if (!(bp_info->bp_list)) {
> +		RTE_LOG(ERR, PMD, "DPAA2 buffer pool not configured");
> +		return -1;
> +	}
> +	dpaa2_mbuf_release(pool, obj_table, bp_info->bpid,
> +			   bp_info->meta_data_size, n);
> +
> +	return 0;
> +}
> +
> +struct rte_mempool_ops dpaa2_mpool_ops = {
> +	.name = "dpaa2",
> +	.alloc = hw_mbuf_create_pool,
> +	.free = hw_mbuf_free_pool,
> +	.enqueue = hw_mbuf_free_bulk,
> +	.dequeue = hw_mbuf_alloc_bulk,
> +};
> +
> +MEMPOOL_REGISTER_OPS(dpaa2_mpool_ops);
> diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpbp.h b/drivers/net/dpaa2/base/dpaa2_hw_dpbp.h
> new file mode 100644
> index 0000000..6efe24f
> --- /dev/null
> +++ b/drivers/net/dpaa2/base/dpaa2_hw_dpbp.h
> @@ -0,0 +1,101 @@
> +/*-
> + *   BSD LICENSE
> + *
> + *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
> + *   Copyright (c) 2016 NXP. All rights reserved.
> + *
> + *   Redistribution and use in source and binary forms, with or without
> + *   modification, are permitted provided that the following conditions
> + *   are met:
> + *
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in
> + *       the documentation and/or other materials provided with the
> + *       distribution.
> + *     * Neither the name of Freescale Semiconductor, Inc nor the names of its
> + *       contributors may be used to endorse or promote products derived
> + *       from this software without specific prior written permission.
> + *
> + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#ifndef _DPAA2_HW_DPBP_H_
> +#define _DPAA2_HW_DPBP_H_
> +
> +#define DPAA2_MAX_BUF_POOLS	8
> +
> +struct dpbp_node {
> +	struct dpbp_node *next;
> +	struct fsl_mc_io dpbp;
> +	uint16_t token;
> +	int dpbp_id;
> +};
> +
> +struct buf_pool_cfg {
> +	void *addr; /*!< The address from where DPAA2 will carve out the
> +			* buffers. 'addr' should be 'NULL' if user wants
> +			* to create buffers from the memory which user
> +			* asked DPAA2 to reserve during 'nadk init' */
> +	phys_addr_t    phys_addr;  /*!< corresponding physical address
> +				* of the memory provided in addr */
> +	uint32_t num; /*!< number of buffers */
> +	uint32_t size; /*!< size of each buffer. 'size' should include
> +			* any headroom to be reserved and alignment */
> +	uint16_t align; /*!< Buffer alignment (in bytes) */
> +	uint16_t bpid; /*!< The buffer pool id. This will be filled
> +			*in by DPAA2 for each buffer pool */
> +};
> +
> +struct buf_pool {
> +	uint32_t size;
> +	uint32_t num_bufs;
> +	uint16_t bpid;
> +	uint8_t *h_bpool_mem;
> +	struct rte_mempool *mp;
> +	struct dpbp_node *dpbp_node;
> +};
> +
> +/*!
> + * Buffer pool list configuration structure. User need to give DPAA2 the
> + * valid number of 'num_buf_pools'.
> + */
> +struct dpaa2_bp_list_cfg {
> +	struct buf_pool_cfg buf_pool; /* Configuration
> +			* of each buffer pool */
> +};
> +
> +struct dpaa2_bp_list {
> +	struct dpaa2_bp_list *next;
> +	struct rte_mempool *mp;
> +	struct buf_pool buf_pool;
> +};
> +
> +struct dpaa2_bp_info {
> +	uint32_t meta_data_size;
> +	uint32_t bpid;
> +	struct dpaa2_bp_list *bp_list;
> +};
> +
> +#define mempool_to_bpinfo(mp) ((struct dpaa2_bp_info *)mp->pool_data)
> +#define mempool_to_bpid(mp) ((mempool_to_bpinfo(mp))->bpid)
> +
> +extern struct dpaa2_bp_info bpid_info[MAX_BPID];
> +
> +int dpaa2_create_dpbp_device(int dpbp_id);
> +
> +int hw_mbuf_alloc_bulk(struct rte_mempool *pool,
> +		       void **obj_table, unsigned count);
> +
> +#endif /* _DPAA2_HW_DPBP_H_ */
> diff --git a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
> index 7dffd5d..5038209 100644
> --- a/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
> +++ b/drivers/net/dpaa2/base/dpaa2_hw_pvt.h
> @@ -41,6 +41,13 @@
>  #define MC_PORTAL_INDEX		0
>  #define NUM_DPIO_REGIONS	2
>  
> +#define MEMPOOL_F_HW_PKT_POOL 0x8000 /**< mpool flag to check offloaded pool */
> +
> +/* Maximum release/acquire from QBMAN */
> +#define DPAA2_MBUF_MAX_ACQ_REL	7
> +
> +#define MAX_BPID 256
> +
>  struct dpaa2_dpio_dev {
>  	TAILQ_ENTRY(dpaa2_dpio_dev) next;
>  		/**< Pointer to Next device instance */
> diff --git a/drivers/net/dpaa2/dpaa2_vfio.c b/drivers/net/dpaa2/dpaa2_vfio.c
> index 71b491b..946a444 100644
> --- a/drivers/net/dpaa2/dpaa2_vfio.c
> +++ b/drivers/net/dpaa2/dpaa2_vfio.c
> @@ -62,7 +62,10 @@
>  #include <rte_dpaa2.h>
>  
>  #include "dpaa2_vfio.h"
> +/* DPAA2 Base interface files */
> +#include <base/dpaa2_hw_pvt.h>
>  #include <base/dpaa2_hw_dpio.h>
> +#include <base/dpaa2_hw_dpbp.h>
>  
>  #define VFIO_MAX_CONTAINERS	1
>  
> @@ -272,7 +275,7 @@ int dpaa2_vfio_process_group(struct rte_bus *bus)
>  	char path[PATH_MAX];
>  	int64_t v_addr;
>  	int ndev_count;
> -	int dpio_count = 0;
> +	int dpio_count = 0, dpbp_count = 0;
>  	struct dpaa2_vfio_group *group = &vfio_groups[0];
>  	static int process_once;
>  
> @@ -423,12 +426,20 @@ int dpaa2_vfio_process_group(struct rte_bus *bus)
>  			if (!ret)
>  				dpio_count++;
>  		}
> +		if (!strcmp(object_type, "dpbp")) {
> +			ret = dpaa2_create_dpbp_device(object_id);
> +			if (!ret)
> +				dpbp_count++;
> +		}
>  	}
>  	closedir(d);
>  
>  	ret = dpaa2_affine_qbman_swp();
>  	if (ret)
>  		DPAA2_VFIO_LOG(DEBUG, "Error in affining qbman swp %d", ret);
> +
> +	RTE_LOG(INFO, PMD, "DPAA2: Added dpbp_count = %d dpio_count=%d\n",
> +		     dpbp_count, dpio_count);
>  	return 0;
>  
>  FAILURE:
> 



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