[dpdk-dev] [PATCH] Patch introducing API to read/write Intel Architecture Model Specific Registers (MSR), rte_msr_read and rte_msr_write functions.

Andralojc, WojciechX wojciechx.andralojc at intel.com
Wed Jan 6 12:47:28 CET 2016


> From: Andralojc, WojciechX
> Sent: Thursday, December 17, 2015 12:13 PM
> To: dev at dpdk.org
> Cc: Andralojc, WojciechX
> Subject: [PATCH] Patch introducing API to read/write Intel Architecture Model
> Specific Registers (MSR), rte_msr_read and rte_msr_write functions.
> 
> There is work in progress to implement Intel Cache Allocation Technology (CAT)
> support in DPDK, this technology is programmed through MSRs.
> In the future it will be possible to program CAT through Linux cgroups and DPDK
> CAT implementation will take advantage of it.
> 
> MSR R/W's are privileged ring 0 operations and they must be done in kernel
> space. For this reason implementation utilizes Linux MSR driver.
> 
> Signed-off-by: Wojciech Andralojc <wojciechx.andralojc at intel.com>

I've got suggestion offline that as MSRs are IA specific,
I should not give the dummy APIs for the other arches
and move MSR access functions into the EAL specific APIs
or some place more arch specific. 
Do you find submitted MSR patch OK?
or do you agree with the above feedback and patch should be re-worked?
I am looking forward to your feedback

Thank you!

Wojciech Andralojc
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Intel Research and Development Ireland Limited
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Registered Office: Collinstown Industrial Park, Leixlip, County Kildare
Registered Number: 308263


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