[dpdk-dev] [PATCH v2 7/7] virtio: add 1.0 support

Yuanhan Liu yuanhan.liu at linux.intel.com
Thu Jan 14 09:22:21 CET 2016


On Thu, Jan 14, 2016 at 08:08:28AM +0000, Xie, Huawei wrote:
> On 1/14/2016 3:58 PM, Yuanhan Liu wrote:
> > On Thu, Jan 14, 2016 at 07:51:08AM +0000, Xie, Huawei wrote:
> >> On 1/14/2016 3:49 PM, Yuanhan Liu wrote:
> >>> On Thu, Jan 14, 2016 at 07:47:17AM +0000, Xie, Huawei wrote:
> >>>> On 1/12/2016 2:58 PM, Yuanhan Liu wrote:
> >>>>> Modern (v1.0) virtio pci device defines several pci capabilities.
> >>>> [snip]
> >>>>> +static void
> >>>>> +modern_notify_queue(struct virtio_hw *hw __rte_unused, struct virtqueue *vq)
> >>>>> +{
> >>>>> +	modern_write16(1, vq->notify_addr);
> >>>>> +}
> >>>> Does virtio 1.0 only supports MMIO? MMIO has long VMEXIT latency than
> >>>> PORT IO.
> >>> Virtio 1.0 supports three transport layer, including MMIO and PCI. And
> >>> we use PCI only in our pmd driver.
> >> I don't mean that MMIO but use memory mapped IO for configuration.
> > Then, yes.
> 
> 00:03.0 Ethernet controller: Red Hat, Inc Virtio network device
>         Subsystem: Red Hat, Inc Device 0001
>         Physical Slot: 3
>         Flags: bus master, fast devsel, latency 0, IRQ 10
>         I/O ports at c100 [size=32]
>         Memory at febd1000 (32-bit, non-prefetchable) [size=4K]
>         Memory at fe000000 (64-bit, prefetchable) [size=8M]
>         Expansion ROM at feb40000 [disabled] [size=256K]
>         Capabilities: [98] MSI-X: Enable+ Count=3 Masked-
>         Capabilities: [84] Vendor Specific Information: Len=14 <?>
>         Capabilities: [70] Vendor Specific Information: Len=14 <?>
>         Capabilities: [60] Vendor Specific Information: Len=10 <?>
>         Capabilities: [50] Vendor Specific Information: Len=10 <?>
>         Capabilities: [40] Vendor Specific Information: Len=10 <?>
>         Kernel driver in use: igb_uio
>         Kernel modules: virtio_pci
> 
> c100 is still there.

Yes,

> For the notification, try PORT IO if possible.

But it doesn't seem right to me to mix legacy registers in modern pci device.

	--yliu


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