[dpdk-dev] [PATCH] EAL:fix memory barrier implementation on IBM POWER

Thomas Monjalon thomas.monjalon at 6wind.com
Thu Jul 21 16:24:23 CEST 2016


2016-07-15 10:30, Chao Zhu:
> On weak memory order architecture like POWER, rte_smp_wmb/rte_smp_rmb
> need to use CPU instructions, not compiler barrier. This patch fixes
> this. Also, to improve performance on PPC64, use light weight sync
> instruction instead of sync instruction.
> 
> Signed-off-by: Chao Zhu <chaozhu at linux.vnet.ibm.com>

Applied, thanks


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