[dpdk-dev] [PATCH 0/2] Added AES counter mode capability
Jain, Deepak K
deepak.k.jain at intel.com
Fri May 6 17:13:24 CEST 2016
Series-Acked-by: Deepak Kumar JAIN <deepak.k.jain at intel.com>
-----Original Message-----
From: Kusztal, ArkadiuszX
Sent: Friday, May 6, 2016 11:22 AM
To: dev at dpdk.org
Cc: Trahe, Fiona <fiona.trahe at intel.com>; Jain, Deepak K <deepak.k.jain at intel.com>; Griffin, John <john.griffin at intel.com>; Kusztal, ArkadiuszX <arkadiuszx.kusztal at intel.com>
Subject: [PATCH 0/2] Added AES counter mode capability
This patchset adds AES counter mode capability for Intel QuickAssist Technology crypto driver.
It adds six test cases for 16B, 24B, 32B key size.
NOTE:
Need to repost this patchset because of the problem in email header.
Arek Kusztal (2):
qat: add AES counter mode capability
app/test: add test cases for AES CTR
app/test/test_cryptodev.c | 254 ++++++++++++++++++++++++
app/test/test_cryptodev_aes_ctr_test_vectors.h | 257 +++++++++++++++++++++++++
doc/guides/cryptodevs/overview.rst | 6 +-
doc/guides/cryptodevs/qat.rst | 3 +
doc/guides/rel_notes/release_16_07.rst | 5 +
drivers/crypto/qat/qat_crypto.c | 29 ++-
6 files changed, 550 insertions(+), 4 deletions(-) create mode 100644 app/test/test_cryptodev_aes_ctr_test_vectors.h
--
2.1.0
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