[dpdk-dev] [PATCH 1/2] net/mlx5: replace memory barrier type

[Shahaf Shuler]

Wednesday, August 23, 2017 4:12 PM, Bruce Richardson:
> On Wed, Aug 23, 2017 at 01:39:08PM +0200, Nélio Laranjeiro wrote:
> > On Mon, Aug 21, 2017 at 10:47:01AM +0300, Sagi Grimberg wrote:
> >
> > Acked-by: Nelio Laranjeiro <nelio.laranjeiro at 6wind.com>
> >
> While a compiler barrier may do on platforms with strong ordering, I'm
> wondering if the rte_smp_wmb() macro may be needed here to give
> compiler barrier or actual memory barrier depending on platform?

Thanks for the catch!

However, the description of rte_smp_wmb() not seems to fit our case here.
We don't try to sync between different lcores, rather between the device and a single lcore. 

Maybe rte_io_wmb fits better? 

> 
> /Bruce