[dpdk-dev] [PATCH v2 1/3] crypto/aesni_gcm: fix J0 padding bytes for GCM

[Azarewicz, PiotrX T]

Hi Arek,

> > Subject: [dpdk-dev] [PATCH v2 1/3] crypto/aesni_gcm: fix J0 padding
> > bytes for GCM
> >
> > This commit fixes pre-counter block (J0) padding by clearing four most
> > significant bytes before setting initial counter value.
> >
> > Fixes: b2bb3597470c ("crypto/aesni_gcm: move pre-counter block to
> > driver")
> >
> > Signed-off-by: Arek Kusztal <arkadiuszx.kusztal at intel.com>
> > ---
> >  drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
> > b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
> > index dba5e15..af3d60f 100644
> > --- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
> > +++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
> > @@ -40,6 +40,7 @@
> >  #include <rte_vdev.h>
> >  #include <rte_malloc.h>
> >  #include <rte_cpuflags.h>
> > +#include <rte_byteorder.h>
> >
> >  #include "aesni_gcm_pmd_private.h"
> >
> > @@ -241,7 +242,8 @@ process_gcm_crypto_op(struct aesni_gcm_qp *qp,
> > struct rte_crypto_sym_op *op,
> >  	 * to set BE LSB to 1, driver expects that 16B is allocated
> 
> I think that 16B expected by driver while only 12B IV is supported is not clear
> from user perspective.
> I think that we should expect 12B only and allocate 16B locally.

I didn't notice that this exception is also described in rte_crypto_sym.h, so this is fine.

> 
> >  	 */
> >  	if (op->cipher.iv.length == 12) {
> > -		op->cipher.iv.data[15] = 1;
> > +		uint32_t *iv_padd = (uint32_t *)&op->cipher.iv.data[12];
> > +		*iv_padd = rte_bswap32(1);
> 
> Should not be that the last byte (number 15) always be set to 1?

I didn't notice that this code will always run in little-endian machine, so this is fine too.

> 
> >  	}
> >
> >  	if (op->auth.aad.length != 12 && op->auth.aad.length != 8 &&
> > --
> > 2.1.0

Acked-by: Piotr Azarewicz <piotrx.t.azarewicz at intel.com>