[dpdk-dev] [PATCH 13/39] event/octeontx: add support for event ports

[Jerin Jacob]

Add in the data-structures for the ports used by workers
to sent events to/from the HW scheduler. Also add a
function to release the resource allocated in setup

Signed-off-by: Jerin Jacob <jerin.jacob at caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla at caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 74 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h | 11 ++++++
 2 files changed, 85 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 8474b90..84868f0 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -184,6 +184,77 @@ ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 	return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
 }
 
+static void
+ssovf_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
+				 struct rte_event_port_conf *port_conf)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	RTE_SET_USED(port_id);
+	port_conf->new_event_threshold = edev->max_num_events;
+	port_conf->dequeue_depth = 1;
+	port_conf->enqueue_depth = 1;
+}
+
+static void
+ssovf_port_release(void *port)
+{
+	rte_free(port);
+}
+
+static int
+ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
+				const struct rte_event_port_conf *port_conf)
+{
+	struct ssows *ws;
+	uint32_t reg_off;
+	uint8_t q;
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	ssovf_func_trace("port=%d", port_id);
+	RTE_SET_USED(port_conf);
+
+	/* Free memory prior to re-allocation if needed */
+	if (dev->data->ports[port_id] != NULL) {
+		ssovf_port_release(dev->data->ports[port_id]);
+		dev->data->ports[port_id] = NULL;
+	}
+
+	/* Allocate event port memory */
+	ws = rte_zmalloc_socket("eventdev ssows",
+			sizeof(struct ssows), RTE_CACHE_LINE_SIZE,
+			dev->data->socket_id);
+	if (ws == NULL) {
+		ssovf_log_err("Failed to alloc memory for port=%d", port_id);
+		return -ENOMEM;
+	}
+
+	ws->base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, port_id, 0);
+	if (ws->base == NULL) {
+		rte_free(ws);
+		ssovf_log_err("Failed to get hws base addr port=%d", port_id);
+		return -EINVAL;
+	}
+
+	reg_off = SSOW_VHWS_OP_GET_WORK0;
+	reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */
+	reg_off |= 1 << 16; /* Wait */
+	ws->getwork = ws->base + reg_off;
+	ws->port = port_id;
+
+	for (q = 0; q < edev->nb_event_queues; q++) {
+		ws->grps[q] = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, q, 2);
+		if (ws->grps[q] == NULL) {
+			rte_free(ws);
+			ssovf_log_err("Failed to get grp%d base addr", q);
+			return -EINVAL;
+		}
+	}
+
+	dev->data->ports[port_id] = ws;
+	ssovf_log_dbg("port=%d ws=%p", port_id, ws);
+	return 0;
+}
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -191,6 +262,9 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.queue_def_conf   = ssovf_queue_def_conf,
 	.queue_setup      = ssovf_queue_setup,
 	.queue_release    = ssovf_queue_release,
+	.port_def_conf    = ssovf_port_def_conf,
+	.port_setup       = ssovf_port_setup,
+	.port_release     = ssovf_port_release,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index d0f5d85..eda0e37 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -131,6 +131,17 @@ struct ssovf_evdev {
 	int32_t max_num_events;
 } __rte_cache_aligned;
 
+/* Event port aka HWS */
+struct ssows {
+	uint8_t cur_tt;
+	uint8_t cur_grp;
+	uint8_t swtag_req;
+	uint8_t *base;
+	uint8_t *getwork;
+	uint8_t *grps[SSO_MAX_VHGRP];
+	uint8_t port;
+} __rte_cache_aligned;
+
 static inline struct ssovf_evdev *
 ssovf_pmd_priv(const struct rte_eventdev *eventdev)
 {
-- 
2.5.5