[dpdk-dev] [PATCH] ring: guarantee ordering of cons/prod loading when doing enqueue/dequeue

Jia He hejianet at gmail.com
Wed Nov 1 05:48:31 CET 2017


Hi Jerin


On 10/31/2017 7:14 PM, Jerin Jacob Wrote:
> -----Original Message-----
>> Date: Tue, 31 Oct 2017 10:55:15 +0800
>> From: Jia He <hejianet at gmail.com>
>> To: Jerin Jacob <jerin.jacob at caviumnetworks.com>
>> Cc: "Ananyev, Konstantin" <konstantin.ananyev at intel.com>, "Zhao, Bing"
>>   <ilovethull at 163.com>, Olivier MATZ <olivier.matz at 6wind.com>,
>>   "dev at dpdk.org" <dev at dpdk.org>, "jia.he at hxt-semitech.com"
>>   <jia.he at hxt-semitech.com>, "jie2.liu at hxt-semitech.com"
>>   <jie2.liu at hxt-semitech.com>, "bing.zhao at hxt-semitech.com"
>>   <bing.zhao at hxt-semitech.com>, "Richardson, Bruce"
>>   <bruce.richardson at intel.com>
>> Subject: Re: [dpdk-dev] [PATCH] ring: guarantee ordering of cons/prod
>>   loading when doing enqueue/dequeue
>> User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101
>>   Thunderbird/52.4.0
>>
>> Hi Jerin
> Hi Jia,
>
>> Do you think  next step whether I need to implement the load_acquire half
>> barrier as per freebsd
> I did a quick prototype using C11 memory model(ACQUIRE/RELEASE) schematics
> and tested on two arm64 platform in Cavium(Platform A: Non arm64 OOO machine)
> and Platform B: arm64 OOO machine)
Can you elaborate anything about your Non arm64 OOO machine? As I know, 
all arm64 server is strong
memory order. Am I missed anything?

-- 
Cheers,
Jia



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