[dpdk-dev] [PATCH] net/mlx5: fix calculating TSO inline size

Nélio Laranjeiro nelio.laranjeiro at 6wind.com
Mon Sep 4 16:01:08 CEST 2017


Hi Yongseok,

Please see some comments below,

On Thu, Aug 31, 2017 at 09:27:06AM -0700, Yongseok Koh wrote:
> Tx descriptor for TSO embeds packet header to be replicated. If Tx inline
> is enabled, there could be additional packet data inlined with 4B inline
> header ahead. And between the header and additional inlined packet data,
> there may be padding to make the inline part aligned to
> MLX5_WQE_DWORD_SIZE. In calculating the total size of inlined data, the
> size of inline header and padding is missing.
> 
> Fixes: 3f13f8c23a7c ("net/mlx5: support hardware TSO")
> Cc: stable at dpdk.org
> 
> Signed-off-by: Shahaf Shuler <shahafs at mellanox.com>
> Signed-off-by: Yongseok Koh <yskoh at mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_rxtx.c | 25 +++++++++----------------
>  1 file changed, 9 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
> index fe9e7eac0..f89fa40b5 100644
> --- a/drivers/net/mlx5/mlx5_rxtx.c
> +++ b/drivers/net/mlx5/mlx5_rxtx.c
> @@ -524,19 +521,20 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
>  		}
>  		/* Inline if enough room. */
>  		if (inline_en || tso) {
> +			uint32_t inl;
>  			uintptr_t end = (uintptr_t)
>  				(((uintptr_t)txq->wqes) +
>  				 (1 << txq->wqe_n) * MLX5_WQE_SIZE);
>  			unsigned int inline_room = max_inline *
>  						   RTE_CACHE_LINE_SIZE -
> -						   (pkt_inline_sz - 2);
> +						   (pkt_inline_sz - 2) -
> +						   !!tso * sizeof(inl);

Is not it dangerous to assume inl will always be 4 bytes long?  Why not
writing the real value instead?

>  			uintptr_t addr_end = (addr + inline_room) &
>  					     ~(RTE_CACHE_LINE_SIZE - 1);
>  			unsigned int copy_b = (addr_end > addr) ?
>  				RTE_MIN((addr_end - addr), length) :
>  				0;
>  
> -			raw += MLX5_WQE_DWORD_SIZE;
>  			if (copy_b && ((end - (uintptr_t)raw) > copy_b)) {
>  				/*
>  				 * One Dseg remains in the current WQE.  To

Thanks,

-- 
Nélio Laranjeiro
6WIND


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