[dpdk-dev] [EXT] Re: [PATCH v2] eal: make max interrupt vectors configurable

[Jerin Jacob Kollanukkaran]

On Tue, 2019-03-26 at 14:43 +0000, Bruce Richardson wrote:

+ Anatoly

> 
> -------------------------------------------------------------------
> ---
> On Tue, Mar 26, 2019 at 03:04:58PM +0100, Thomas Monjalon wrote:
> > 26/03/2019 14:21, Pavan Nikhilesh Bhagavatula:
> > > From: Pavan Nikhilesh <pbhagavatula at marvell.com>
> > > 
> > > Make max interrupt vectors configurable so that platforms can
> > > choose interrupt vector limit.
> > 
> > What is the impact of setting a big value?
> > Can we agree on a big enough value without introducing any config?
> > 
> Is it a value that needs to be set differently per-platform, perhaps?

MSI supports 32 interrupts, MSI-X can allocate up to 2048 interrupt as
per the PCIe Spec.

In terms of cost, a few KB of memory in rte_intr_handle in structure
and more file handlers for vfio.

I think, We can move to reasonable numbers as 256 or 512 considering
the latest PCIe multi function devices will have enough interrupts.

And I don't think, it is a platform value as common config needs to
work for distro build which is using the base config. Marvell has PCIe
device which has 256 MSIX vectors, Not sure about other PCIe card.