[dpdk-dev] [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER

[Pradeep Satyanarayana]

Thomas Monjalon <thomas at monjalon.net> wrote on 03/22/2019 10:51:17 AM:

> From: Thomas Monjalon <thomas at monjalon.net>
> To: Pradeep Satyanarayana <pradeep at us.ibm.com>
> Cc: bruce.richardson at intel.com, Chao Zhu
> <chaozhu at linux.vnet.ibm.com>, Dekel Peled <dekelp at mellanox.com>,
> dev at dpdk.org, David Christensen <drc at ibm.com>,
> honnappa.nagarahalli at arm.com, konstantin.ananyev at intel.com,
> ola.liljedahl at arm.com, Ori Kam <orika at mellanox.com>, Shahaf Shuler
> <shahafs at mellanox.com>, David Wilder <wilder at us.ibm.com>, Yongseok
> Koh <yskoh at mellanox.com>
> Date: 03/22/2019 10:51 AM
> Subject: Re: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER
>
> 22/03/2019 16:30, Pradeep Satyanarayana:
> > Thomas Monjalon <thomas at monjalon.net> wrote on 03/22/2019 01:49:03 AM:
> > > 22/03/2019 02:40, Pradeep Satyanarayana:
> > > > - rte_[rw]mb (general memory barrier) --> should be lwsync
> > >
> > > This is what may be discussed.
> > > The assumption is that the general memory barrier should cover
> > > all cases (CPU caches, SMP and I/O).
> > > That's why we think it should "sync" for Power.
> >
> > In that case, at a minimum we must de-link rte_smp_[rw]mb from
rte_[rw]mb
> > and retain it as lwsync. Agreed?
>
> I have no clue about what is needed for SMP barrier in Power.
> As long as it works as expected, no problem.
>

We will try that out and report back here, later next week

Thanks
Pradeep
pradeep at us.ibm.com