[dpdk-dev] [PATCH] event/octeontx2: use c11 atomics for statistics

[Phil Yang]

> -----Original Message-----
> From: pbhagavatula at marvell.com <pbhagavatula at marvell.com>
> Sent: Friday, March 27, 2020 4:56 PM
> To: jerinj at marvell.com; Honnappa Nagarahalli
> <Honnappa.Nagarahalli at arm.com>; Phil Yang <Phil.Yang at arm.com>; Pavan
> Nikhilesh <pbhagavatula at marvell.com>
> Cc: dev at dpdk.org
> Subject: [dpdk-dev] [PATCH] event/octeontx2: use c11 atomics for statistics
> 
> From: Pavan Nikhilesh <pbhagavatula at marvell.com>
> 
> Use c11 atomics with RELAXED ordering instead of rte_atomic ops which
> enforce unnessary barries on arm64.
> 
> Signed-off-by: Pavan Nikhilesh <pbhagavatula at marvell.com>
> ---
>  drivers/event/octeontx2/otx2_tim_evdev.c  | 5 +++--
>  drivers/event/octeontx2/otx2_tim_evdev.h  | 2 +-
>  drivers/event/octeontx2/otx2_tim_worker.c | 5 +++--
>  3 files changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c
> b/drivers/event/octeontx2/otx2_tim_evdev.c
> index cd0dcde24..4c24cc8a6 100644
> --- a/drivers/event/octeontx2/otx2_tim_evdev.c
> +++ b/drivers/event/octeontx2/otx2_tim_evdev.c
> @@ -526,7 +526,8 @@ otx2_tim_stats_get(const struct
> rte_event_timer_adapter *adapter,
>  	uint64_t bkt_cyc = rte_rdtsc() - tim_ring->ring_start_cyc;
> 
> 
> -	stats->evtim_exp_count = rte_atomic64_read(&tim_ring->arm_cnt);
> +	stats->evtim_exp_count = __atomic_load_n(&tim_ring->arm_cnt,
> +						 __ATOMIC_RELAXED);
>  	stats->ev_enq_count = stats->evtim_exp_count;
>  	stats->adapter_tick_count = rte_reciprocal_divide_u64(bkt_cyc,
>  				&tim_ring->fast_div);
> @@ -538,7 +539,7 @@ otx2_tim_stats_reset(const struct
> rte_event_timer_adapter *adapter)
>  {
>  	struct otx2_tim_ring *tim_ring = adapter->data->adapter_priv;
> 
> -	rte_atomic64_clear(&tim_ring->arm_cnt);
> +	__atomic_store_n(&tim_ring->arm_cnt, 0, __ATOMIC_RELAXED);

Both otx2_tim_stats_get & otx2_tim_stats_reset operations are handled in the same thread,
and the arm_cmn read & store operations are sequential consistent in this case. 
So RELAXED memory ordering here is enough.

>  	return 0;
>  }
> 
> diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h
> b/drivers/event/octeontx2/otx2_tim_evdev.h
> index 56895dcbf..44e3c7b51 100644
> --- a/drivers/event/octeontx2/otx2_tim_evdev.h
> +++ b/drivers/event/octeontx2/otx2_tim_evdev.h
> @@ -149,7 +149,7 @@ struct otx2_tim_ring {
>  	struct otx2_tim_bkt *bkt;
>  	struct rte_mempool *chunk_pool;
>  	struct rte_reciprocal_u64 fast_div;
> -	rte_atomic64_t arm_cnt;
> +	uint64_t arm_cnt;
>  	uint8_t prod_type_sp;
>  	uint8_t enable_stats;
>  	uint8_t disable_npa;
> diff --git a/drivers/event/octeontx2/otx2_tim_worker.c
> b/drivers/event/octeontx2/otx2_tim_worker.c
> index 104674c79..4b5cfdc72 100644
> --- a/drivers/event/octeontx2/otx2_tim_worker.c
> +++ b/drivers/event/octeontx2/otx2_tim_worker.c
> @@ -88,7 +88,7 @@ tim_timer_arm_burst(const struct
> rte_event_timer_adapter *adptr,
>  	}
> 
>  	if (flags & OTX2_TIM_ENA_STATS)
> -		rte_atomic64_add(&tim_ring->arm_cnt, index);
> +		__atomic_fetch_add(&tim_ring->arm_cnt, index,
> __ATOMIC_RELAXED);
> 
>  	return index;
>  }
> @@ -130,7 +130,8 @@ tim_timer_arm_tmo_brst(const struct
> rte_event_timer_adapter *adptr,
>  			break;
>  	}
>  	if (flags & OTX2_TIM_ENA_STATS)
> -		rte_atomic64_add(&tim_ring->arm_cnt, set_timers);
> +		__atomic_fetch_add(&tim_ring->arm_cnt, set_timers,
> +				   __ATOMIC_RELAXED);
> 
>  	return set_timers;
>  }
> --
> 2.17.1

It goods good to me.

Reviewed-by: Phil Yang <phil.yang at arm.com>

Thanks,
Phil