[dpdk-dev] [PATCH 1/2] config: add Graviton2(arm64) meson configuration

[Ali Saidi]

On 9/17/20 9:02 PM, Jerin Jacob wrote:
>
> On Thu, Sep 17, 2020 at 10:41 PM Honnappa Nagarahalli
> <Honnappa.Nagarahalli at arm.com> wrote:
>>
>> <snip>
>>
>>>>>
>>>>> On 9/11/20 8:23 PM, Honnappa Nagarahalli wrote:
>>>>>>
>>>>>> +Jerin, Hemant, Dharmik
>>>>>>
>>>>>> <snip>
>>>>>> Hi Vimal,
>>>>>>         Few comments inline.
>>>>>>
>>>>>>>
>>>>>>> Add meson build configuration for Graviton2 platform with 64-bit
>>>>>>> ARM Neoverse N1 cores. This patch makes the following changes to
>>>>>>> generic Neoverse N1 config:
>>>>>>>
>>>>>>> 1. increase lcore limit to 64
>>>>>>> 2. increase memory support to 1TB
>>>>>> There will be multiple SoCs with N1 cores. All of them will have
>>>>>> the same
>>>>> implementor ID and part number. But, they will have different values
>>>>> for these configurable parameters.
>>>>>> IMO, from usage perspective, we have 2 cases:
>>>>>> 1) Ability to build a portable binary that can run on multiple Arm
>>>>>> SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2
>>>>>> etc)
>>>>>> 2) Ability to build a binary which would run only on a SoC it was
>>>>>> compiled
>>>>> for and provide the most optimized binary for that SoC. But, this
>>>>> may not be portable.
>>>>>>
>>>>>> For 1) we have default march.
>>>>>>
>>>>>> For 2) we do not have the capability today in meson build (at
>>>>>> least, this is
>>>>> my understanding, please correct me if I am wrong). In this case,
>>>>> the user knows the target platform for compilation. IMO, we should
>>>>> add the capability to take the target platform as an input from the
>>>>> user (similar to the make build system) and Graviton2 can be one such
>>> target platform.
>>>>>
>>>>> My intention was to have parameters that work for both N1SDP and
>>>>> Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and
>>>>> RTE_MAX_MEM_MB make them incompatible with N1SDP?
>>>> They are not optimal for N1SDP. In the future these parameters might have
>>> to be changed. For ex: if there a N1 based SoC with more than 64 CPU cores.
>>>
>>>
>>> Sorry for the late reply.
>>>
>>> Looking at the Bluefield, Graviton2, and upcoming SoCs based on ARM IP, It is
>>> very clear that MIDR value can not be changed by the silicon vendors.
>>> So our existing build scheme of using the MIDR  value-based probe does not
>>> work anymore with ARM IP.
>>> So IMO, We need to change our build scheme. i.e
>>>
>>> 1) For native build just use -march=native
>> I think we do not need the native build. With the native build, it is not possible to identify the SoC and use the correct configuration parameters.

For native binaries the answer should be either use -march=native or map the MIDR to
the compiler options. The MIDR defines the core and thus the core features and which
architecture features the compiler supports. It seems like the only sticking point here
is RTE_MAX_MEM_MB and RTE_MAX_LCORE. Is the slight increase in memory size by having a
reasonable max for the various SoCs given a single core MIDR (80 seems to be the high
number for N1 currently), reason to add complexity and require the user to explicitly
pass the system they're compiling for?

Thanks,

Ali