[dpdk-dev] [PATCH v2 11/62] net/cnxk: add common devargs parsing function
Jerin Jacob
jerinjacobk at gmail.com
Mon Jun 14 06:22:21 CEST 2021
On Mon, Jun 7, 2021 at 11:34 PM Nithin Dabilpuram
<ndabilpuram at marvell.com> wrote:
>
> Add various devargs parsing command line arguments
> parsing functions supported by CN9K and CN10K.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram at marvell.com>
> ---
> doc/guides/nics/cnxk.rst | 94 +++++++++++++++++++
> drivers/net/cnxk/cnxk_ethdev.c | 7 ++
> drivers/net/cnxk/cnxk_ethdev.h | 9 ++
> drivers/net/cnxk/cnxk_ethdev_devargs.c | 166 +++++++++++++++++++++++++++++++++
> drivers/net/cnxk/meson.build | 3 +-
> 5 files changed, 278 insertions(+), 1 deletion(-)
> create mode 100644 drivers/net/cnxk/cnxk_ethdev_devargs.c
>
> diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
> index ca21842..611ffb4 100644
> --- a/doc/guides/nics/cnxk.rst
> +++ b/doc/guides/nics/cnxk.rst
> @@ -27,3 +27,97 @@ Driver compilation and testing
>
> Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
> for details.
> +
> +Runtime Config Options
> +----------------------
> +
> +- ``Rx&Tx scalar mode enable`` (default ``0``)
> +
> + Ethdev supports both scalar and vector mode, it may be selected at runtime
Ethdev->PMD
> + using ``scalar_enable`` ``devargs`` parameter.
> +
> +- ``RSS reta size`` (default ``64``)
> +
> + RSS redirection table size may be configured during runtime using ``reta_size``
> + ``devargs`` parameter.
> +
> + For example::
> +
> + -a 0002:02:00.0,reta_size=256
> +
> + With the above configuration, reta table of size 256 is populated.
> +
> +- ``Flow priority levels`` (default ``3``)
> +
> + RTE Flow priority levels can be configured during runtime using
> + ``flow_max_priority`` ``devargs`` parameter.
> +
> + For example::
> +
> + -a 0002:02:00.0,flow_max_priority=10
> +
> + With the above configuration, priority level was set to 10 (0-9). Max
> + priority level supported is 32.
> +
> +- ``Reserve Flow entries`` (default ``8``)
> +
> + RTE flow entries can be pre allocated and the size of pre allocation can be
> + selected runtime using ``flow_prealloc_size`` ``devargs`` parameter.
> +
> + For example::
> +
> + -a 0002:02:00.0,flow_prealloc_size=4
> +
> + With the above configuration, pre alloc size was set to 4. Max pre alloc
> + size supported is 32.
> +
> +- ``Max SQB buffer count`` (default ``512``)
> +
> + Send queue descriptor buffer count may be limited during runtime using
> + ``max_sqb_count`` ``devargs`` parameter.
> +
> + For example::
> +
> + -a 0002:02:00.0,max_sqb_count=64
> +
> + With the above configuration, each send queue's decscriptor buffer count is
Typo
> + limited to a maximum of 64 buffers.
> +
> +- ``Switch header enable`` (default ``none``)
> +
> + A port can be configured to a specific switch header type by using
> + ``switch_header`` ``devargs`` parameter.
> +
> + For example::
> +
> + -a 0002:02:00.0,switch_header="higig2"
> +
> + With the above configuration, higig2 will be enabled on that port and the
> + traffic on this port should be higig2 traffic only. Supported switch header
> + types are "higig2", "dsa", "chlen90b" and "chlen24b".
> +
> +- ``RSS tag as XOR`` (default ``0``)
> +
> + The HW gives two options to configure the RSS adder i.e
> +
> + * ``rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^ flow_tag<23:16> ^ flow_tag<31:24>``
> +
> + * ``rss_adder<7:0> = flow_tag<7:0>``
> +
More information about the dev
mailing list