[dpdk-dev] [PATCH] common/cnxk: add new IDs to the supported devices lists

Jerin Jacob jerinjacobk at gmail.com
Wed Oct 20 19:27:28 CEST 2021


On Sat, Oct 2, 2021 at 2:12 AM Tomasz Duszynski <tduszynski at marvell.com> wrote:
>
> CNF10KA does not differ it terms of RVU resources from
> CN10KA platform hence add it to list of devices respective
> drivers support.
>
> Otherwise devices on CNF10KA are not probed even though
> compatible drivers exist.
>
> Signed-off-by: Tomasz Duszynski <tduszynski at marvell.com>

Rebased to next-net-mrvl

Acked-by: Jerin Jacob <jerinj at marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks


> ---
>  drivers/common/cnxk/roc_api.h       |  1 +
>  drivers/event/cnxk/cn10k_eventdev.c |  2 ++
>  drivers/mempool/cnxk/cnxk_mempool.c | 14 ++++++++++++++
>  drivers/net/cnxk/cn10k_ethdev.c     |  3 +++
>  4 files changed, 20 insertions(+)
>
> diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h
> index 7dec8453b4..5a4edbc94e 100644
> --- a/drivers/common/cnxk/roc_api.h
> +++ b/drivers/common/cnxk/roc_api.h
> @@ -64,6 +64,7 @@
>
>  #define PCI_SUBSYSTEM_DEVID_CN10KA  0xB900
>  #define PCI_SUBSYSTEM_DEVID_CN10KAS 0xB900
> +#define PCI_SUBSYSTEM_DEVID_CNF10KA 0xBA00
>
>  #define PCI_SUBSYSTEM_DEVID_CN9KA 0x0000
>  #define PCI_SUBSYSTEM_DEVID_CN9KB 0xb400
> diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
> index 8af273a01b..dbf19505a4 100644
> --- a/drivers/event/cnxk/cn10k_eventdev.c
> +++ b/drivers/event/cnxk/cn10k_eventdev.c
> @@ -952,8 +952,10 @@ cn10k_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
>  static const struct rte_pci_id cn10k_pci_sso_map[] = {
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
> +       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
> +       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
>         {
>                 .vendor_id = 0,
>         },
> diff --git a/drivers/mempool/cnxk/cnxk_mempool.c b/drivers/mempool/cnxk/cnxk_mempool.c
> index dd4d74ca05..33d1ac7889 100644
> --- a/drivers/mempool/cnxk/cnxk_mempool.c
> +++ b/drivers/mempool/cnxk/cnxk_mempool.c
> @@ -169,6 +169,13 @@ static const struct rte_pci_id npa_pci_map[] = {
>                 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
>                 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KAS,
>         },
> +       {
> +               .class_id = RTE_CLASS_ANY_ID,
> +               .vendor_id = PCI_VENDOR_ID_CAVIUM,
> +               .device_id = PCI_DEVID_CNXK_RVU_NPA_PF,
> +               .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
> +               .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CNF10KA,
> +       },
>         {
>                 .class_id = RTE_CLASS_ANY_ID,
>                 .vendor_id = PCI_VENDOR_ID_CAVIUM,
> @@ -183,6 +190,13 @@ static const struct rte_pci_id npa_pci_map[] = {
>                 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
>                 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KAS,
>         },
> +       {
> +               .class_id = RTE_CLASS_ANY_ID,
> +               .vendor_id = PCI_VENDOR_ID_CAVIUM,
> +               .device_id = PCI_DEVID_CNXK_RVU_NPA_VF,
> +               .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
> +               .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CNF10KA,
> +       },
>         {
>                 .vendor_id = 0,
>         },
> diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
> index 7caec6cf14..08df24d8e2 100644
> --- a/drivers/net/cnxk/cn10k_ethdev.c
> +++ b/drivers/net/cnxk/cn10k_ethdev.c
> @@ -528,10 +528,13 @@ cn10k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
>  static const struct rte_pci_id cn10k_pci_nix_map[] = {
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_PF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_PF),
> +       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_PF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_VF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_VF),
> +       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_VF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_AF_VF),
>         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_AF_VF),
> +       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_AF_VF),
>         {
>                 .vendor_id = 0,
>         },
> --
> 2.25.1
>


More information about the dev mailing list