[PATCH v2 4/5] baseband/acc100: start explicitly PF Monitor from PMD

[Nicolas Chautru]

Ensure the performance monitor is restarted in case this
is reset after VF FLR.

Signed-off-by: Nicolas Chautru <nicolas.chautru at intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 4 ++++
 drivers/baseband/acc100/rte_acc100_pmd.h | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index b03cedc..b588f5f 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -263,6 +263,10 @@
 					& 0xF;
 	}
 
+	/* Start Pmon */
+	acc100_reg_write(d, reg_addr->pmon_ctrl_a, 0x2);
+	acc100_reg_write(d, reg_addr->pmon_ctrl_b, 0x2);
+
 	/* Read PF mode */
 	if (d->pf_device) {
 		reg_mode = acc100_reg_read(d, HWPfHiPfMode);
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.h b/drivers/baseband/acc100/rte_acc100_pmd.h
index 6438031..f126cc0 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.h
+++ b/drivers/baseband/acc100/rte_acc100_pmd.h
@@ -475,6 +475,8 @@ struct acc100_registry_addr {
 	unsigned int depth_log1_offset;
 	unsigned int qman_group_func;
 	unsigned int ddr_range;
+	unsigned int pmon_ctrl_a;
+	unsigned int pmon_ctrl_b;
 };
 
 /* Structure holding registry addresses for PF */
@@ -504,6 +506,8 @@ struct acc100_registry_addr {
 	.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
 	.qman_group_func = HWPfQmgrGrpFunction0,
 	.ddr_range = HWPfDmaVfDdrBaseRw,
+	.pmon_ctrl_a = HWPfPermonACntrlRegVf,
+	.pmon_ctrl_b = HWPfPermonBCntrlRegVf,
 };
 
 /* Structure holding registry addresses for VF */
@@ -533,6 +537,8 @@ struct acc100_registry_addr {
 	.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
 	.qman_group_func = HWVfQmgrGrpFunction0Vf,
 	.ddr_range = HWVfDmaDdrBaseRangeRoVf,
+	.pmon_ctrl_a = HWVfPmACntrlRegVf,
+	.pmon_ctrl_b = HWVfPmBCntrlRegVf,
 };
 
 /* Structure associated with each queue. */
-- 
1.8.3.1