[EXT] [PATCH v5 3/5] eal/interrupts: add IRQ count in interrupt handle

Nipun Gupta nipun.gupta at amd.com
Tue Jun 6 09:27:16 CEST 2023



On 6/6/2023 12:48 PM, Harman Kalra wrote:
> 
>> -----Original Message-----
>> From: Nipun Gupta <nipun.gupta at amd.com>
>> Sent: Thursday, May 25, 2023 3:38 PM
>> To: dev at dpdk.org; thomas at monjalon.net; david.marchand at redhat.com;
>> Harman Kalra <hkalra at marvell.com>; anatoly.burakov at intel.com;
>> stephen at networkplumber.org
>> Cc: ferruh.yigit at amd.com; harpreet.anand at amd.com;
>> nikhil.agarwal at amd.com; Nipun Gupta <nipun.gupta at amd.com>
>> Subject: [EXT] [PATCH v5 3/5] eal/interrupts: add IRQ count in interrupt
>> handle
>>
>> External Email
>>
>> ----------------------------------------------------------------------
>> Have total number of IRQ count support in interrupt handle.
>> In case of VFIO this IRQ count is returned when
>> VFIO_DEVICE_GET_IRQ_INFO ioctl is invoked. This IRQ_count can used by
>> the devices to store/provide total number of interrupts available and to
>> enable or disable these interrupts.
>>
> 
> Hi Nipun,
> 
> We already have "max_intr" field for the same purpose and its respective APIs
> plt_intr_max_intr_set()/plt_intr_max_intr_get()

Hi Harman,

If we have a look into rte_intr_efd_enable() API, 'max_intr' being set 
in this API. So once a driver is using the interrupts the 'max_intr' 
would be overwritten. 'nb_intr' which is described as "Max vector count" 
seems more relevant to me here and I have used 'nb_intr' to have the 
total interrupt count available and sent out the updated series for CDX 
bus. Please let me know in case you have separate thoughts on this.

Thanks,
Nipun

> 
> Thanks
> Harman


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