[PATCH] config/arm: add AMD CDX

Ruifeng Wang Ruifeng.Wang at arm.com
Fri Jun 16 10:36:02 CEST 2023


> -----Original Message-----
> From: Nipun Gupta <nipun.gupta at amd.com>
> Sent: Friday, June 16, 2023 12:19 AM
> To: dev at dpdk.org; thomas at monjalon.net; david.marchand at redhat.com
> Cc: ferruh.yigit at amd.com; nikhil.agarwal at amd.com; Ruifeng Wang <Ruifeng.Wang at arm.com>;
> Honnappa Nagarahalli <Honnappa.Nagarahalli at arm.com>; Nipun Gupta <nipun.gupta at amd.com>
> Subject: [PATCH] config/arm: add AMD CDX
> 
> Add meson build configuration for AMD CDX platform.
> 
> Signed-off-by: Nipun Gupta <nipun.gupta at amd.com>
> ---
> This patch was earlier submitted as part of AMD CDX bus, but as it is platform support it
> has been separated out from the bus series. Previous patch link:
> http://patches.dpdk.org/project/dpdk/patch/20230421145406.12831-6-nipun.gupta@amd.com/
> 
>  config/arm/arm64_cdx_linux_gcc | 17 +++++++++++++++++
>  config/arm/meson.build         | 14 ++++++++++++++
>  2 files changed, 31 insertions(+)
>  create mode 100644 config/arm/arm64_cdx_linux_gcc
> 
> diff --git a/config/arm/arm64_cdx_linux_gcc b/config/arm/arm64_cdx_linux_gcc new file mode
> 100644 index 0000000000..8e6d619dae
> --- /dev/null
> +++ b/config/arm/arm64_cdx_linux_gcc
> @@ -0,0 +1,17 @@
> +[binaries]
> +c = ['ccache', 'aarch64-linux-gnu-gcc'] cpp = ['ccache',
> +'aarch64-linux-gnu-g++'] ar = 'aarch64-linux-gnu-ar'
> +as = 'aarch64-linux-gnu-as'
> +strip = 'aarch64-linux-gnu-strip'
> +pkgconfig = 'aarch64-linux-gnu-pkg-config'
> +pcap-config = ''
> +
> +[host_machine]
> +system = 'linux'
> +cpu_family = 'aarch64'
> +cpu = 'armv8-a'
> +endian = 'little'
> +
> +[properties]
> +platform = 'cdx'
> diff --git a/config/arm/meson.build b/config/arm/meson.build index ae2226988e..213b535a6f
> 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -305,6 +305,18 @@ soc_bluefield = {
>      'numa': false
>  }
> 
> +soc_cdx = {
> +    'description': 'AMD CDX',
> +    'implementer': '0x41',
> +    'part_number': '0xd42',
> +    'flags': [
> +        ['RTE_MACHINE', '"cdx"'],
> +        ['RTE_MAX_LCORE', 16],
> +        ['RTE_MAX_NUMA_NODES', 1]
> +    ],
> +    'numa': false
> +}
> +
>  soc_centriq2400 = {
>      'description': 'Qualcomm Centriq 2400',
>      'implementer': '0x51',
> @@ -463,6 +475,7 @@ generic_aarch32: Generic un-optimized build for armv8 aarch32
> execution mode.
>  armada:          Marvell ARMADA
>  bluefield:       NVIDIA BlueField
>  bluefield3:      NVIDIA BlueField-3
> +cdx:             AMD CDX
>  centriq2400:     Qualcomm Centriq 2400
>  cn9k:            Marvell OCTEON 9
>  cn10k:           Marvell OCTEON 10
> @@ -490,6 +503,7 @@ socs = {
>      'armada': soc_armada,
>      'bluefield': soc_bluefield,
>      'bluefield3': soc_bluefield3,
> +    'cdx': soc_cdx,
>      'centriq2400': soc_centriq2400,
>      'cn9k': soc_cn9k,
>      'cn10k' : soc_cn10k,
> --
> 2.17.1

Acked-by: Ruifeng Wang <ruifeng.wang at arm.com>



More information about the dev mailing list