[PATCH v4 0/3] simplified to 3 layer Tx scheduler

Zhang, Qi Z qi.z.zhang at intel.com
Tue Jan 9 06:30:15 CET 2024



> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zhang at intel.com>
> Sent: Tuesday, January 9, 2024 4:22 AM
> To: Yang, Qiming <qiming.yang at intel.com>; Wu, Wenjun1
> <wenjun1.wu at intel.com>
> Cc: dev at dpdk.org; Zhang, Qi Z <qi.z.zhang at intel.com>
> Subject: [PATCH v4 0/3] simplified to 3 layer Tx scheduler
> 
> Remove dummy layers, code refactor, complete document
> 
> v4:
> - rebase.
> 
> v3:
> - fix tm_node memory free.
> - fix corrupt when slibling node deletion is not in a reversed order.
> 
> v2:
> - fix typos.
> 
> Qi Zhang (3):
>   net/ice: hide port and TC layer in Tx sched tree
>   net/ice: refactor tm config data structure
>   doc: update ice document for qos
> 
>  doc/guides/nics/ice.rst      |  19 +++
>  drivers/net/ice/ice_ethdev.h |  12 +-
>  drivers/net/ice/ice_tm.c     | 317 +++++++++++++----------------------
>  3 files changed, 134 insertions(+), 214 deletions(-)
> 
> --
> 2.31.1

Applied to dpdk-next-net-intel.

Thanks
Qi


More information about the dev mailing list