[dts] [PATCH] dut.py: sort port list to ensure RRC nics will be configured correctly

[Liu, Yong]

Hi Heng,
I think we do not need to sort all ports in self.pci_devices_info. Only need to swap the first port and second port of RRC nic.

> -----Original Message-----
> From: dts [mailto:dts-bounces at dpdk.org] On Behalf Of Ding Heng
> Sent: Tuesday, April 12, 2016 9:38 AM
> To: dts at dpdk.org
> Cc: Ding, HengX
> Subject: [dts] [PATCH] dut.py: sort port list to ensure RRC nics will be
> configured correctly
> 
> Signed-off-by: Ding Heng <hengx.ding at intel.com>
> 
> diff --git a/framework/dut.py b/framework/dut.py
> index bd437cb..291fef0 100644
> --- a/framework/dut.py
> +++ b/framework/dut.py
> @@ -627,6 +627,20 @@ class Dut(Crb):
>          """
>          Scan ports information or just read it from cache file.
>          """
> +        #sort ports and ensure that first port of RRC nics will be
> +        #initialized first
> +        sorted_ports = []
> +        ports_cfg = self.conf.get_ports_config()
> +        for port_cfg_all in ports_cfg.keys():
> +            if 'tp_path' in ports_cfg[port_cfg_all].keys():
> +                for port in self.pci_devices_info:
> +                    sorted_port = [port]
> +                    if port_cfg_all in port:
> +                        self.pci_devices_info.remove(port)
> +                        for i in self.pci_devices_info:
> +                            sorted_port.append(i)
> +        self.pci_devices_info = sorted_port
> +
>          if self.read_cache:
>              self.load_serializer_ports()
>              self.scan_ports_cached()
> --
> 1.9.3