[dts] [PATCH V1 02/12] tests/unit_tests_crc:change hard coding for core numbers
yaobing
bingx.y.yao at intel.com
Wed Oct 24 04:24:44 CEST 2018
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao at intel.com>
---
tests/TestSuite_unit_tests_crc.py | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/TestSuite_unit_tests_crc.py b/tests/TestSuite_unit_tests_crc.py
index e09729a..d37faf3 100644
--- a/tests/TestSuite_unit_tests_crc.py
+++ b/tests/TestSuite_unit_tests_crc.py
@@ -37,6 +37,7 @@ Cmdline autotest
"""
from test_case import TestCase
+import utils
#
#
@@ -55,7 +56,8 @@ class TestUnitTestsCrc(TestCase):
"""
Run at the start of each test suite.
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
def set_up(self):
"""
@@ -68,7 +70,7 @@ class TestUnitTestsCrc(TestCase):
Run cmdline autotests in RTE comand line.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("crc_autotest", "RTE>>", 60)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
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