[dts] [PATCH V1 0/3] add test suite cvl_limit_value_test

[Peng, Yuan]

Acked-by Peng, Yuan <yuan.peng at intel.com>


-----Original Message-----
From: dts <dts-bounces at dpdk.org> On Behalf Of sunqin
Sent: Wednesday, November 4, 2020 6:25 PM
To: dts at dpdk.org
Cc: Sun, QinX <qinx.sun at intel.com>
Subject: [dts] [PATCH V1 0/3] add test suite cvl_limit_value_test

These 8 cases take a long time to run, so split them from 3 already existed
 
suites (iavf_fdir, cvl_fdir, cvl_dcf_switch_filter) and make them as a new test suite

sunqin (3):
  test_plans/cvl_limit_value_test: add test plan
  tests/cvl_limit_value_test: add cvl_limit test suite
  conf/cvl_limit_value_test: add config file for new test suite

 conf/cvl_limit_value_test.cfg                 |   5 +
 test_plans/cvl_limit_value_test_test_plan.rst | 594 ++++++++++++
 tests/TestSuite_cvl_limit_value_test.py       | 917 ++++++++++++++++++
 3 files changed, 1516 insertions(+)
 create mode 100644 conf/cvl_limit_value_test.cfg  create mode 100644 test_plans/cvl_limit_value_test_test_plan.rst
 create mode 100644 tests/TestSuite_cvl_limit_value_test.py

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2.17.1