[dts] [PATCH V4 1/2] tests/cvl_advanced_rss_gtpogre: add case parse_pfcp_over_gre_packet

[David Marchand]

On Mon, Jun 7, 2021 at 5:13 AM Xiang An <xiangx.an at intel.com> wrote:
>

Empty commitlog...


> Signed-off-by: Xiang An <xiangx.an at intel.com>
> ---
>  tests/TestSuite_cvl_advanced_rss_gtpogre.py | 55 +++++++++++++++++++++++++++++
>  1 file changed, 55 insertions(+)
>
> diff --git a/tests/TestSuite_cvl_advanced_rss_gtpogre.py b/tests/TestSuite_cvl_advanced_rss_gtpogre.py
> index 4a889ea..17029a8 100755
> --- a/tests/TestSuite_cvl_advanced_rss_gtpogre.py
> +++ b/tests/TestSuite_cvl_advanced_rss_gtpogre.py
> @@ -3503,7 +3503,62 @@ class TestCVLAdvancedRSSGTPoGRE(TestCase):
>          self.switch_testpmd(enable_rss=True)
>          self.rssprocess.handle_rss_distribute_cases(cases_info=inner_l4_protocal_hash)
>
> +    def change_dpdk_code(self):
> +        """
> +            change dpdk's code to show the PFCP ptype
> +        """
> +        file1 = "drivers/net/ice/ice_rxtx.c"
> +        file2 = "drivers/net/ice/ice_rxtx_vec_avx2.c"
> +        match1 = "rte_le_to_cpu_16(rxdp\[j\].wb.ptype_flex_flags0)\];"
> +        match2 = "const uint16_t ptype0 = _mm256_extract_epi16(ptypes0_1, 1);"
> +        insert1 = "printf(\"ptype: %d\\\\n\", ICE_RX_FLEX_DESC_PTYPE_M & rte_le_to_cpu_16(rxdp\[j\].wb.ptype_flex_flags0));"
> +        insert2 = "printf(\"ptype: %d\\\\n\", ptype0);"
> +
> +        self.dut.send_expect("rm -rf drivers/net/ice/ice_rxtx.c_bak", "# ")
> +        self.dut.send_expect("cp -rf drivers/net/ice/ice_rxtx.c drivers/net/ice/ice_rxtx.c_bak", "# ")
> +        self.dut.send_expect("rm -rf drivers/net/ice/ice_rxtx_vec_avx2.c_bak", "# ")
> +        self.dut.send_expect("cp -rf drivers/net/ice/ice_rxtx_vec_avx2.c drivers/net/ice/ice_rxtx_vec_avx2.c_bak", "# ")
> +        self.dut.send_expect("sed -i '/%s/a\%s' %s"%(match1,insert1,file1), "# ")
> +        self.dut.send_expect("sed -i '/%s/a\%s' %s"%(match2,insert2,file2), "# ")

And changing driver code.

NAK.


-- 
David Marchand