[dts][PATCH V1]test_plans/nic_single_core_perf: modify test plan to adapt meson build

[hanyingya]

Signed-off-by: hanyingya <yingyax.han at intel.com>
---
 test_plans/nic_single_core_perf_test_plan.rst | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/test_plans/nic_single_core_perf_test_plan.rst b/test_plans/nic_single_core_perf_test_plan.rst
index 7f86312f..405be401 100644
--- a/test_plans/nic_single_core_perf_test_plan.rst
+++ b/test_plans/nic_single_core_perf_test_plan.rst
@@ -64,12 +64,11 @@ Prerequisites
     4 TG 10g ports for 4 NNT10G ports
 
 4. Case config::
-    For FVL40g, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=y"
-    in ./config/common_base and re-build DPDK.
 
-    For CVL25G, if test 16 Byte Descriptor, need to set the "CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=y"
-    in ./config/common_base and re-build DPDK.
-    
+    if test 16 or 32 Byte Descriptor, please set the value of 
+    "rx_desc_size" to 16 or 32 in dts/conf/nic_single_core_perf.cfg,
+    and the default value is 16.
+
 Test Case : Single Core Performance Measurement
 ===============================================
 1) Bind tested ports to igb_uio
-- 
2.25.1