> -----Original Message----- > From: Qi Fu <qi.fu at intel.com> > Sent: 2022年1月18日 0:21 > To: dts at dpdk.org > Cc: Fu, Qi <qi.fu at intel.com> > Subject: [dts][PATCH V3]test_plans: add test plan for cvl flow priority > > add test plan for cvl flow priority. > > Signed-off-by: Qi Fu <qi.fu at intel.com> Applied