[dts][PATCH V1 2/2] tests/vm2vm_virtio_user: Modify case sync with testplan

[Jiang, YuX]

> -----Original Message-----
> From: He, Xingguang <xingguang.he at intel.com>
> Sent: Friday, February 11, 2022 11:42 AM
> To: dts at dpdk.org
> Cc: Chen, LingliX <linglix.chen at intel.com>; Ling, WeiX <weix.ling at intel.com>
> Subject: RE: [dts][PATCH V1 2/2] tests/vm2vm_virtio_user: Modify case sync
> with testplan
> 
> > -----Original Message-----
> > From: Ling, WeiX <weix.ling at intel.com>
> > Sent: Thursday, February 10, 2022 3:47 PM
> > To: dts at dpdk.org
> > Cc: He, Xingguang <xingguang.he at intel.com>; Ling, WeiX
> > <weix.ling at intel.com>
> > Subject: [dts][PATCH V1 2/2] tests/vm2vm_virtio_user: Modify case sync
> > with testplan
> >
> > 1.To cover all paths, four cases related to split ring (test cases 14,
> > 15, 16, 17) and four cases related to packed ring (test cases 20, 21, 22, 23)
> are added.
> > 2.Cbdma related cases(case 12, 13, 18, 19), the iova = PA step is added.
> > 3.Case 24: to test the indirect feature when choose packed
> > vectorized-tx path, and we have no relevant cases before.
> >
> > Signed-off-by: Wei Ling <weix.ling at intel.com>
> >
> 
> Acked-by:  Xingguang He<xingguang.he at intel.com>
Tested-by: Yu Jiang <YuX.Jiang at intel.com>