[dpdk-stable] [dpdk-dev] [PATCH] net/i40e: fix flow director for IPv6

[Peng, Yuan]

Tested-by: Peng, Yuan <yuan.peng at intel.com>

- Tested Branch: dpdk-next-crypto/master
- Tested commit 18872f511c17a0a3591d4bfa5d56eefa5b85339c+7patches+this patch
- OS: 4.5.5-300.fc24.x86_64
- GCC: gcc version 6.1.1 20160510 (Red Hat 6.1.1-2) (GCC)
- CPU: Intel(R) Xeon(R) CPU E5-2699 v4 @ 2.20GHz
- NIC: Intel Corporation Device Fortville [8086:1583]
- Default x86_64-native-linuxapp-gcc configuration
- Prerequisites:
- Total 1cases, 1 passed, 0 failed

Steps:
DUT:
./usertools/dpdk-devbind.py -b igb_uio 05:00.0
 ./x86_64-native-linuxapp-gcc/app/testpmd -c 1ffff -n 4 -w 05:00.0 --file-prefix=pf --socket-mem=1024,1024 -- -i --rxq=16 --txq=16 --disable-rss --pkt-filter-mode=perfect
testpmd> set fwd rxonly
testpmd> set verbose 1
testpmd> start
testpmd> flow create 0 ingress pattern eth / vlan tci is 1 / ipv6 src is 2001::1 dst is 2001::2 tc is 1 proto is 5 hop is 10 / end actions queue index 1 / end
Flow rule #0 created

tester:
scapy
pkt1 = Ether(dst="00:11:22:33:44:55")/Dot1Q(vlan=1)/IPv6(src="2001::1", dst="2001::2", tc=1, nh=5, hlim=10)/Raw('x' * 20)

DUT:
testpmd> port 0/queue 1: received 1 packets
  src=00:00:00:00:00:00 - dst=00:11:22:33:44:55 - type=0x86dd - length=74 - nb_segs=1 - FDIR matched hash=0x0 ID=0x0  - VLAN tci=0x1 - hw ptype: L2_ETHER L3_IPV6_EXT_UNKNOWN L4_NONFRAG  - sw ptype: L2_ETHER L3_IPV6  - l2_len=14 - l3_len=40 - Receive queue=0x1
  ol_flags: PKT_RX_VLAN_PKT PKT_RX_FDIR PKT_RX_L4_CKSUM_GOOD PKT_RX_IP_CKSUM_GOOD PKT_RX_VLAN_STRIPPED

pkt1 to queue 1, the bug fixed.

-----Original Message-----
From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Beilei Xing
Sent: Thursday, June 22, 2017 5:31 PM
To: Wu, Jingjing <jingjing.wu at intel.com>
Cc: dev at dpdk.org; stable at dpdk.org
Subject: [dpdk-dev] [PATCH] net/i40e: fix flow director for IPv6

After adding a fdir rule for IPv6 with input set TC, IPv6 packets with the specific TC can't be assigned the right queue.
The root cause is that TC is parsed wrongly, this patch fixes TC parsing problem.

Fixes: 7d83c152a207 ("net/i40e: parse flow director filter")
Cc: stable at dpdk.org

Signed-off-by: Beilei Xing <beilei.xing at intel.com>
---
 drivers/net/i40e/i40e_ethdev.h |  1 +
 drivers/net/i40e/i40e_fdir.c   |  1 -
 drivers/net/i40e/i40e_flow.c   | 14 ++++++++------
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 05ecd27..80f9504 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -448,6 +448,7 @@ struct i40e_vmdq_info {
 			I40E_PRTQF_FLX_PIT_DEST_OFF_MASK))
 #define I40E_WORD(hi, lo) (uint16_t)((((hi) << 8) & 0xFF00) | ((lo) & 0xFF))  #define I40E_FLEX_WORD_MASK(off) (0x80 >> (off))
+#define I40E_FDIR_IPv6_TC_OFFSET	20
 
 /*
  * Structure to store flex pit for flow diretor.
diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index a970b56..8013add 100644
--- a/drivers/net/i40e/i40e_fdir.c
+++ b/drivers/net/i40e/i40e_fdir.c
@@ -67,7 +67,6 @@
 #define I40E_FDIR_IP_DEFAULT_VERSION_IHL    0x45
 #define I40E_FDIR_TCP_DEFAULT_DATAOFF       0x50
 #define I40E_FDIR_IPv6_DEFAULT_VTC_FLOW     0x60000000
-#define I40E_FDIR_IPv6_TC_OFFSET            20
 
 #define I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS   0xFF
 #define I40E_FDIR_IPv6_PAYLOAD_LEN          380
diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index c7589ce..1a27572 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -52,8 +52,7 @@
 #include "base/i40e_prototype.h"
 #include "i40e_ethdev.h"
 
-#define I40E_IPV4_TC_SHIFT	4
-#define I40E_IPV6_TC_MASK	(0x00FF << I40E_IPV4_TC_SHIFT)
+#define I40E_IPV6_TC_MASK	(0xFF << I40E_FDIR_IPv6_TC_OFFSET)
 #define I40E_IPV6_FRAG_HEADER	44
 #define I40E_TENANT_ARRAY_NUM	3
 #define I40E_TCI_MASK		0xFFFF
@@ -2352,6 +2351,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
 	bool cfg_flex_msk = true;
 	uint16_t outer_tpid;
 	uint16_t ether_type;
+	uint32_t vtc_flow_cpu;
 	int ret;
 
 	memset(off_arr, 0, I40E_MAX_FLXPLD_FIED); @@ -2508,8 +2508,8 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
 					input_set |= I40E_INSET_IPV6_DST;
 
 				if ((ipv6_mask->hdr.vtc_flow &
-				     rte_cpu_to_be_16(I40E_IPV6_TC_MASK))
-				    == rte_cpu_to_be_16(I40E_IPV6_TC_MASK))
+				     rte_cpu_to_be_32(I40E_IPV6_TC_MASK))
+				    == rte_cpu_to_be_32(I40E_IPV6_TC_MASK))
 					input_set |= I40E_INSET_IPV6_TC;
 				if (ipv6_mask->hdr.proto == UINT8_MAX)
 					input_set |= I40E_INSET_IPV6_NEXT_HDR; @@ -2517,9 +2517,11 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
 					input_set |= I40E_INSET_IPV6_HOP_LIMIT;
 
 				/* Get filter info */
+				vtc_flow_cpu =
+				      rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
 				filter->input.flow.ipv6_flow.tc =
-					(uint8_t)(ipv6_spec->hdr.vtc_flow <<
-						  I40E_IPV4_TC_SHIFT);
+					(uint8_t)(vtc_flow_cpu >>
+						  I40E_FDIR_IPv6_TC_OFFSET);
 				filter->input.flow.ipv6_flow.proto =
 					ipv6_spec->hdr.proto;
 				filter->input.flow.ipv6_flow.hop_limits =
--
2.5.5