[dpdk-stable] patch 'examples/performance-thread: fix compilation on Suse 11 SP2' has been queued to stable release 17.02.1
Yuanhan Liu
yuanhan.liu at linux.intel.com
Thu May 25 11:49:18 CEST 2017
Hi,
FYI, your patch has been queued to stable release 17.02.1
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 05/28/17. So please
shout if anyone has objections.
Thanks.
--yliu
---
>From 35857b900683a81ce72e03a3e89bd57fe592cc40 Mon Sep 17 00:00:00 2001
From: Bruce Richardson <bruce.richardson at intel.com>
Date: Mon, 24 Apr 2017 14:04:22 +0100
Subject: [PATCH] examples/performance-thread: fix compilation on Suse 11 SP2
MIME-Version: 1.0
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[ upstream commit 1e6d5a960820a377e2453a13c8cd2e6797dc2f76 ]
Fixes following compilation error, using uint64_t type,
instead of int128_t unnecessarily:
In file included from ./common/lthread.c:82:0:
./common/lthread_timer.h: In function ‘_ns_to_clks’:
./common/lthread_timer.h:49:20: error: expected ‘=’, ‘,’, ‘;’,
‘asm’ or ‘__attribute__’ before ‘clkns’
compilation terminated due to -Wfatal-errors.
Fixes: 116819b9ed0d ("examples/performance-thread: add lthread subsystem")
Signed-off-by: Bruce Richardson <bruce.richardson at intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch at intel.com>
---
examples/performance-thread/common/lthread_timer.h | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/examples/performance-thread/common/lthread_timer.h b/examples/performance-thread/common/lthread_timer.h
index b5e6fb0..2d14757 100644
--- a/examples/performance-thread/common/lthread_timer.h
+++ b/examples/performance-thread/common/lthread_timer.h
@@ -42,11 +42,22 @@
static inline uint64_t
_ns_to_clks(uint64_t ns)
{
- unsigned __int128 clkns = rte_get_tsc_hz();
+ /*
+ * clkns needs to be divided by 1E9 to get ns clocks. However,
+ * dividing by this first would lose a lot of accuracy.
+ * Dividing after a multiply by ns, could cause overflow of
+ * uint64_t if ns is about 5 seconds [if we assume a max tsc
+ * rate of 4GHz]. Therefore we first divide by 1E4, then
+ * multiply and finally divide by 1E5. This allows ns to be
+ * values many hours long, without overflow, while still keeping
+ * reasonable accuracy.
+ */
+ uint64_t clkns = rte_get_tsc_hz() / 1e4;
clkns *= ns;
- clkns /= 1000000000;
- return (uint64_t) clkns;
+ clkns /= 1e5;
+
+ return clkns;
}
--
1.9.0
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