[dpdk-stable] patch 'net/ixgbe: fix TDH register write' has been queued to LTS release 16.11.9

[Luca Boccassi]

Hi,

FYI, your patch has been queued to LTS release 16.11.9

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/28/18. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the patch applied
to the branch. If the code is different (ie: not only metadata diffs), due for example to
a change in context or macro names, please double check it.

Thanks.

Luca Boccassi

---
>From 959bee3ddbf0ebec8248dd7fd4e62f4a37aedc0b Mon Sep 17 00:00:00 2001
From: Yanglong Wu <yanglong.wu at intel.com>
Date: Tue, 20 Nov 2018 13:59:21 +0800
Subject: [PATCH] net/ixgbe: fix TDH register write

[ upstream commit ff30a020bb400f04bf64a91416993862f45f9ada ]

The only time that software should write to the TDH register
is after a reset (hardware reset or CTRL.RST) and
before enabling the transmit function (TXDCTL.ENABLE).
If software were to write to this register while the transmit
function was enabled, the on-chip descriptor buffers might
be invalidated and the hardware could become confused.

Fixes: 029fd06d40fa ("ixgbe: queue start and stop")

Signed-off-by: Yanglong Wu <yanglong.wu at intel.com>
Acked-by: Qi Zhang <qi.z.zhang at intel.com>
---
 drivers/net/ixgbe/ixgbe_rxtx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 55afb5393..4b1a6f48e 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -5000,6 +5000,7 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 
 	if (tx_queue_id < dev->data->nb_tx_queues) {
 		txq = dev->data->tx_queues[tx_queue_id];
+		IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
 		txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txq->reg_idx));
 		txdctl |= IXGBE_TXDCTL_ENABLE;
 		IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txq->reg_idx), txdctl);
@@ -5017,7 +5018,6 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 					     "Tx Queue %d", tx_queue_id);
 		}
 		rte_wmb();
-		IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_TDT(txq->reg_idx), 0);
 		dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 	} else
-- 
2.19.2

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2018-11-26 12:45:13.687842423 +0000
+++ 0004-net-ixgbe-fix-TDH-register-write.patch	2018-11-26 12:45:13.611202330 +0000
@@ -1,8 +1,10 @@
-From ff30a020bb400f04bf64a91416993862f45f9ada Mon Sep 17 00:00:00 2001
+From 959bee3ddbf0ebec8248dd7fd4e62f4a37aedc0b Mon Sep 17 00:00:00 2001
 From: Yanglong Wu <yanglong.wu at intel.com>
 Date: Tue, 20 Nov 2018 13:59:21 +0800
 Subject: [PATCH] net/ixgbe: fix TDH register write
 
+[ upstream commit ff30a020bb400f04bf64a91416993862f45f9ada ]
+
 The only time that software should write to the TDH register
 is after a reset (hardware reset or CTRL.RST) and
 before enabling the transmit function (TXDCTL.ENABLE).
@@ -11,7 +13,6 @@
 be invalidated and the hardware could become confused.
 
 Fixes: 029fd06d40fa ("ixgbe: queue start and stop")
-Cc: stable at dpdk.org
 
 Signed-off-by: Yanglong Wu <yanglong.wu at intel.com>
 Acked-by: Qi Zhang <qi.z.zhang at intel.com>
@@ -20,25 +21,25 @@
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
-index 2f0262ae1..ddc7efa87 100644
+index 55afb5393..4b1a6f48e 100644
 --- a/drivers/net/ixgbe/ixgbe_rxtx.c
 +++ b/drivers/net/ixgbe/ixgbe_rxtx.c
-@@ -5264,6 +5264,7 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
- 	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- 
- 	txq = dev->data->tx_queues[tx_queue_id];
-+	IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
- 	txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txq->reg_idx));
- 	txdctl |= IXGBE_TXDCTL_ENABLE;
- 	IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txq->reg_idx), txdctl);
-@@ -5281,7 +5282,6 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
- 				tx_queue_id);
- 	}
- 	rte_wmb();
--	IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
- 	IXGBE_WRITE_REG(hw, IXGBE_TDT(txq->reg_idx), 0);
- 	dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
+@@ -5000,6 +5000,7 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
  
+ 	if (tx_queue_id < dev->data->nb_tx_queues) {
+ 		txq = dev->data->tx_queues[tx_queue_id];
++		IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
+ 		txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txq->reg_idx));
+ 		txdctl |= IXGBE_TXDCTL_ENABLE;
+ 		IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txq->reg_idx), txdctl);
+@@ -5017,7 +5018,6 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
+ 					     "Tx Queue %d", tx_queue_id);
+ 		}
+ 		rte_wmb();
+-		IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
+ 		IXGBE_WRITE_REG(hw, IXGBE_TDT(txq->reg_idx), 0);
+ 		dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
+ 	} else
 -- 
 2.19.2