[dpdk-stable] patch 'net/virtio: fix PCI config error handling' has been queued to LTS release 17.11.5
Yongseok Koh
yskoh at mellanox.com
Fri Nov 30 19:02:19 CET 2018
> On Nov 30, 2018, at 7:23 AM, Tiwei Bie <tiwei.bie at intel.com> wrote:
>
> On Thu, Nov 29, 2018 at 03:11:19PM -0800, Yongseok Koh wrote:
>> Hi,
>>
>> FYI, your patch has been queued to LTS release 17.11.5
>>
>> Note it hasn't been pushed to https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdpdk.org%2Fbrowse%2Fdpdk-stable&data=02%7C01%7Cyskoh%40mellanox.com%7C1766cef373824913300308d656d824fa%7Ca652971c7d2e4d9ba6a4d149256f461b%7C0%7C0%7C636791883664358292&sdata=qS38KVRaj5V%2BAjZkosvooP7Zj%2F1EC52pOgdA5hyU8mw%3D&reserved=0 yet.
>> It will be pushed if I get no objections before 12/01/18. So please
>> shout if anyone has objections.
>
> Hi,
>
> This patch can't be backported, as it depends on some API
> change in newer release.
This patch could be applied cleanly but I'll remove it.
Thanks for confirming,
Yongseok
>>
>> Also note that after the patch there's a diff of the upstream commit vs the patch applied
>> to the branch. If the code is different (ie: not only metadata diffs), due for example to
>> a change in context or macro names, please double check it.
>>
>> Thanks.
>>
>> Yongseok
>>
>> ---
>> From b5196f660ce80df58babdd718f26ff980a841513 Mon Sep 17 00:00:00 2001
>> From: Brian Russell <brussell at brocade.com>
>> Date: Tue, 28 Aug 2018 11:12:40 +0100
>> Subject: [PATCH] net/virtio: fix PCI config error handling
>>
>> [ upstream commit 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd ]
>>
>> In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns
>> the number of bytes read from PCI config or < 0 on error.
>> If less than the expected number of bytes are read then log the
>> failure and return rather than carrying on with garbage.
>>
>> Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0")
>>
>> Signed-off-by: Brian Russell <brussell at brocade.com>
>> Signed-off-by: Luca Boccassi <bluca at debian.org>
>> Reviewed-by: Tiwei Bie <tiwei.bie at intel.com>
>> ---
>> drivers/net/virtio/virtio_pci.c | 65 ++++++++++++++++++++++++++++++-----------
>> 1 file changed, 48 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
>> index 9574498fb..89986c335 100644
>> --- a/drivers/net/virtio/virtio_pci.c
>> +++ b/drivers/net/virtio/virtio_pci.c
>> @@ -596,16 +596,18 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> }
>>
>> ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);
>> - if (ret < 0) {
>> - PMD_INIT_LOG(DEBUG, "failed to read pci capability list");
>> + if (ret != 1) {
>> + PMD_INIT_LOG(DEBUG,
>> + "failed to read pci capability list, ret %d", ret);
>> return -1;
>> }
>>
>> while (pos) {
>> - ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);
>> - if (ret < 0) {
>> - PMD_INIT_LOG(ERR,
>> - "failed to read pci cap at pos: %x", pos);
>> + ret = rte_pci_read_config(dev, &cap, 2, pos);
>> + if (ret != 2) {
>> + PMD_INIT_LOG(DEBUG,
>> + "failed to read pci cap at pos: %x ret %d",
>> + pos, ret);
>> break;
>> }
>>
>> @@ -615,7 +617,16 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> * 1st byte is cap ID; 2nd byte is the position of next
>> * cap; next two bytes are the flags.
>> */
>> - uint16_t flags = ((uint16_t *)&cap)[1];
>> + uint16_t flags;
>> +
>> + ret = rte_pci_read_config(dev, &flags, sizeof(flags),
>> + pos + 2);
>> + if (ret != sizeof(flags)) {
>> + PMD_INIT_LOG(DEBUG,
>> + "failed to read pci cap at pos:"
>> + " %x ret %d", pos + 2, ret);
>> + break;
>> + }
>>
>> if (flags & PCI_MSIX_ENABLE)
>> hw->use_msix = VIRTIO_MSIX_ENABLED;
>> @@ -630,6 +641,14 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> goto next;
>> }
>>
>> + ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);
>> + if (ret != sizeof(cap)) {
>> + PMD_INIT_LOG(DEBUG,
>> + "failed to read pci cap at pos: %x ret %d",
>> + pos, ret);
>> + break;
>> + }
>> +
>> PMD_INIT_LOG(DEBUG,
>> "[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u",
>> pos, cap.cfg_type, cap.bar, cap.offset, cap.length);
>> @@ -718,25 +737,37 @@ enum virtio_msix_status
>> vtpci_msix_detect(struct rte_pci_device *dev)
>> {
>> uint8_t pos;
>> - struct virtio_pci_cap cap;
>> int ret;
>>
>> ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);
>> - if (ret < 0) {
>> - PMD_INIT_LOG(DEBUG, "failed to read pci capability list");
>> + if (ret != 1) {
>> + PMD_INIT_LOG(DEBUG,
>> + "failed to read pci capability list, ret %d", ret);
>> return VIRTIO_MSIX_NONE;
>> }
>>
>> while (pos) {
>> - ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);
>> - if (ret < 0) {
>> - PMD_INIT_LOG(ERR,
>> - "failed to read pci cap at pos: %x", pos);
>> + uint8_t cap[2];
>> +
>> + ret = rte_pci_read_config(dev, cap, sizeof(cap), pos);
>> + if (ret != sizeof(cap)) {
>> + PMD_INIT_LOG(DEBUG,
>> + "failed to read pci cap at pos: %x ret %d",
>> + pos, ret);
>> break;
>> }
>>
>> - if (cap.cap_vndr == PCI_CAP_ID_MSIX) {
>> - uint16_t flags = ((uint16_t *)&cap)[1];
>> + if (cap[0] == PCI_CAP_ID_MSIX) {
>> + uint16_t flags;
>> +
>> + ret = rte_pci_read_config(dev, &flags, sizeof(flags),
>> + pos + sizeof(cap));
>> + if (ret != sizeof(flags)) {
>> + PMD_INIT_LOG(DEBUG,
>> + "failed to read pci cap at pos:"
>> + " %x ret %d", pos + 2, ret);
>> + break;
>> + }
>>
>> if (flags & PCI_MSIX_ENABLE)
>> return VIRTIO_MSIX_ENABLED;
>> @@ -744,7 +775,7 @@ vtpci_msix_detect(struct rte_pci_device *dev)
>> return VIRTIO_MSIX_DISABLED;
>> }
>>
>> - pos = cap.cap_next;
>> + pos = cap[1];
>> }
>>
>> return VIRTIO_MSIX_NONE;
>> --
>> 2.11.0
>>
>> ---
>> Diff of the applied patch vs upstream commit (please double-check if non-empty:
>> ---
>> --- - 2018-11-29 15:01:48.971545454 -0800
>> +++ 0085-net-virtio-fix-PCI-config-error-handling.patch 2018-11-29 15:01:45.234959000 -0800
>> @@ -1,15 +1,16 @@
>> -From 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd Mon Sep 17 00:00:00 2001
>> +From b5196f660ce80df58babdd718f26ff980a841513 Mon Sep 17 00:00:00 2001
>> From: Brian Russell <brussell at brocade.com>
>> Date: Tue, 28 Aug 2018 11:12:40 +0100
>> Subject: [PATCH] net/virtio: fix PCI config error handling
>>
>> +[ upstream commit 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd ]
>> +
>> In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns
>> the number of bytes read from PCI config or < 0 on error.
>> If less than the expected number of bytes are read then log the
>> failure and return rather than carrying on with garbage.
>>
>> Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0")
>> -Cc: stable at dpdk.org
>>
>> Signed-off-by: Brian Russell <brussell at brocade.com>
>> Signed-off-by: Luca Boccassi <bluca at debian.org>
>> @@ -19,10 +20,10 @@
>> 1 file changed, 48 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
>> -index 6bd22e54a..b6a3c80b4 100644
>> +index 9574498fb..89986c335 100644
>> --- a/drivers/net/virtio/virtio_pci.c
>> +++ b/drivers/net/virtio/virtio_pci.c
>> -@@ -567,16 +567,18 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> +@@ -596,16 +596,18 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> }
>>
>> ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);
>> @@ -47,7 +48,7 @@
>> break;
>> }
>>
>> -@@ -586,7 +588,16 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> +@@ -615,7 +617,16 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> * 1st byte is cap ID; 2nd byte is the position of next
>> * cap; next two bytes are the flags.
>> */
>> @@ -65,7 +66,7 @@
>>
>> if (flags & PCI_MSIX_ENABLE)
>> hw->use_msix = VIRTIO_MSIX_ENABLED;
>> -@@ -601,6 +612,14 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> +@@ -630,6 +641,14 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>> goto next;
>> }
>>
>> @@ -80,7 +81,7 @@
>> PMD_INIT_LOG(DEBUG,
>> "[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u",
>> pos, cap.cfg_type, cap.bar, cap.offset, cap.length);
>> -@@ -689,25 +708,37 @@ enum virtio_msix_status
>> +@@ -718,25 +737,37 @@ enum virtio_msix_status
>> vtpci_msix_detect(struct rte_pci_device *dev)
>> {
>> uint8_t pos;
>> @@ -127,7 +128,7 @@
>>
>> if (flags & PCI_MSIX_ENABLE)
>> return VIRTIO_MSIX_ENABLED;
>> -@@ -715,7 +746,7 @@ vtpci_msix_detect(struct rte_pci_device *dev)
>> +@@ -744,7 +775,7 @@ vtpci_msix_detect(struct rte_pci_device *dev)
>> return VIRTIO_MSIX_DISABLED;
>> }
>>
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