[dpdk-stable] patch 'net/mlx5: optimize Rx hash fields conversion' has been queued to stable release 19.11.1

luca.boccassi at gmail.com luca.boccassi at gmail.com
Tue Feb 11 12:21:06 CET 2020


Hi,

FYI, your patch has been queued to stable release 19.11.1

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/13/20. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Thanks.

Luca Boccassi

---
>From 92290f523dc17fcd6188729d3d32f40007167fd6 Mon Sep 17 00:00:00 2001
From: Dekel Peled <dekelp at mellanox.com>
Date: Wed, 15 Jan 2020 23:19:39 +0200
Subject: [PATCH] net/mlx5: optimize Rx hash fields conversion

[ upstream commit 70ccb6056847a87bba374d703f51705344982eec ]

Previous fix added translation of Rx hash fields to PRM format.

This patch optimizes the fix, to perform value translation only
if value is not zero.
In case value is zero, there is no need to translate it.

Fixes: c3e33304a7f6 ("net/mlx5: fix setting of Rx hash fields")

Signed-off-by: Dekel Peled <dekelp at mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at mellanox.com>
---
 drivers/net/mlx5/mlx5_rxq.c | 34 +++++++++++++++++++---------------
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 906ff0e045..da020a0aa0 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -2453,7 +2453,6 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
 		}
 	} else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */
 		struct mlx5_devx_tir_attr tir_attr;
-		struct mlx5_rx_hash_field_select *rx_hash_field_select;
 		uint32_t i;
 		uint32_t lro = 1;
 
@@ -2467,23 +2466,27 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
 		memset(&tir_attr, 0, sizeof(tir_attr));
 		tir_attr.disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT;
 		tir_attr.rx_hash_fn = MLX5_RX_HASH_FN_TOEPLITZ;
-#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 		tir_attr.tunneled_offload_en = !!tunnel;
-		/* Translate hash_fields bitmap to PRM format. */
-		rx_hash_field_select = hash_fields & IBV_RX_HASH_INNER ?
-				       &tir_attr.rx_hash_field_selector_inner :
-				       &tir_attr.rx_hash_field_selector_outer;
+		/* If needed, translate hash_fields bitmap to PRM format. */
+		if (hash_fields) {
+#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
+			struct mlx5_rx_hash_field_select *rx_hash_field_select =
+					hash_fields & IBV_RX_HASH_INNER ?
+					&tir_attr.rx_hash_field_selector_inner :
+					&tir_attr.rx_hash_field_selector_outer;
 #else
-		rx_hash_field_select = &tir_attr.rx_hash_field_selector_outer;
+			struct mlx5_rx_hash_field_select *rx_hash_field_select =
+					&tir_attr.rx_hash_field_selector_outer;
 #endif
-		/* 1 bit: 0: IPv4, 1: IPv6. */
-		rx_hash_field_select->l3_prot_type =
-			!!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
-		/* 1 bit: 0: TCP, 1: UDP. */
-		rx_hash_field_select->l4_prot_type =
-			!!(hash_fields & MLX5_UDP_IBV_RX_HASH);
-		/* Bitmask which sets which fields to use in RX Hash. */
-		rx_hash_field_select->selected_fields =
+
+			/* 1 bit: 0: IPv4, 1: IPv6. */
+			rx_hash_field_select->l3_prot_type =
+				!!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
+			/* 1 bit: 0: TCP, 1: UDP. */
+			rx_hash_field_select->l4_prot_type =
+				!!(hash_fields & MLX5_UDP_IBV_RX_HASH);
+			/* Bitmask which sets which fields to use in RX Hash. */
+			rx_hash_field_select->selected_fields =
 			((!!(hash_fields & MLX5_L3_SRC_IBV_RX_HASH)) <<
 			 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP) |
 			(!!(hash_fields & MLX5_L3_DST_IBV_RX_HASH)) <<
@@ -2492,6 +2495,7 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
 			 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT |
 			(!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) <<
 			 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT;
+		}
 		if (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN)
 			tir_attr.transport_domain = priv->sh->td->id;
 		else
-- 
2.20.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2020-02-11 11:17:42.933213192 +0000
+++ 0120-net-mlx5-optimize-Rx-hash-fields-conversion.patch	2020-02-11 11:17:38.600005087 +0000
@@ -1,8 +1,10 @@
-From 70ccb6056847a87bba374d703f51705344982eec Mon Sep 17 00:00:00 2001
+From 92290f523dc17fcd6188729d3d32f40007167fd6 Mon Sep 17 00:00:00 2001
 From: Dekel Peled <dekelp at mellanox.com>
 Date: Wed, 15 Jan 2020 23:19:39 +0200
 Subject: [PATCH] net/mlx5: optimize Rx hash fields conversion
 
+[ upstream commit 70ccb6056847a87bba374d703f51705344982eec ]
+
 Previous fix added translation of Rx hash fields to PRM format.
 
 This patch optimizes the fix, to perform value translation only
@@ -10,7 +12,6 @@
 In case value is zero, there is no need to translate it.
 
 Fixes: c3e33304a7f6 ("net/mlx5: fix setting of Rx hash fields")
-Cc: stable at dpdk.org
 
 Signed-off-by: Dekel Peled <dekelp at mellanox.com>
 Acked-by: Viacheslav Ovsiienko <viacheslavo at mellanox.com>
@@ -19,10 +20,10 @@
  1 file changed, 19 insertions(+), 15 deletions(-)
 
 diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
-index c87ce151d7..4092cb71ce 100644
+index 906ff0e045..da020a0aa0 100644
 --- a/drivers/net/mlx5/mlx5_rxq.c
 +++ b/drivers/net/mlx5/mlx5_rxq.c
-@@ -2465,7 +2465,6 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
+@@ -2453,7 +2453,6 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
  		}
  	} else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */
  		struct mlx5_devx_tir_attr tir_attr;
@@ -30,7 +31,7 @@
  		uint32_t i;
  		uint32_t lro = 1;
  
-@@ -2479,23 +2478,27 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
+@@ -2467,23 +2466,27 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
  		memset(&tir_attr, 0, sizeof(tir_attr));
  		tir_attr.disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT;
  		tir_attr.rx_hash_fn = MLX5_RX_HASH_FN_TOEPLITZ;
@@ -72,7 +73,7 @@
  			((!!(hash_fields & MLX5_L3_SRC_IBV_RX_HASH)) <<
  			 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP) |
  			(!!(hash_fields & MLX5_L3_DST_IBV_RX_HASH)) <<
-@@ -2504,6 +2507,7 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
+@@ -2492,6 +2495,7 @@ mlx5_hrxq_new(struct rte_eth_dev *dev,
  			 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT |
  			(!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) <<
  			 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT;


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