[dpdk-stable] [PATCH v4] lib/table: fix cache alignment issue

Dumitrescu, Cristian cristian.dumitrescu at intel.com
Wed Jul 22 10:26:48 CEST 2020



> +#ifdef RTE_ARCH_64
>  struct rte_bucket_4_32 {
>  	/* Cache line 0 */
>  	uint64_t signature[4 + 1];
> @@ -46,6 +47,22 @@ struct rte_bucket_4_32 {
>  	/* Cache line 3 */
>  	uint8_t data[0];
>  };
> +#else
> +struct rte_bucket_4_32 {
> +	/* Cache line 0 */
> +	uint64_t signature[4 + 1];
> +	uint64_t lru_list;
> +	struct rte_bucket_4_32 *next;
> +	uint32_t pad;
> +	uint64_t next_valid;
> +
> +	/* Cache lines 1 and 2 */
> +	uint64_t key[4][4];
> +
> +	/* Cache line 3 */
> +	uint8_t data[0];
> +};
> +#endif
> 

Hi Ting,

Yes, it looks good, but as mentioned previously please do the same on the other files in the same folder and add the changes to your patch, as we need to keep all these files in sync:

rte_table_hash_key8.c, struct rte_bucket_4_8
rte_table_hash_key32.c, struct rte_bucket_4_32

Thanks,
Cristian


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