[dpdk-stable] patch 'common/qat: fix GEN3 marketing name' has been queued to LTS release 18.11.9
Kevin Traynor
ktraynor at redhat.com
Thu Jun 4 18:36:30 CEST 2020
On 04/06/2020 17:29, Trahe, Fiona wrote:
> HI Kevin,
>
Hi Fiona,
> Sorry about the delay in responding to this - but I just found out that Intel don't want to do this after all.
> We need to revert it in 20.08.
> So please also don't apply on 18.11.9.
> Sorry again if this has caused you wasted effort.
>
No problem, I haven't pushed this batch yet, so I can just drop it. If I
had pushed, we could have reverted - so no big deal :-)
Thanks for following up about it.
Kevin.
> Fiona
>
>
>> -----Original Message-----
>> From: Kevin Traynor <ktraynor at redhat.com>
>> Sent: Thursday, May 28, 2020 5:22 PM
>> To: Dybkowski, AdamX <adamx.dybkowski at intel.com>
>> Cc: Trahe, Fiona <fiona.trahe at intel.com>; dpdk stable <stable at dpdk.org>
>> Subject: patch 'common/qat: fix GEN3 marketing name' has been queued to LTS release 18.11.9
>>
>> Hi,
>>
>> FYI, your patch has been queued to LTS release 18.11.9
>>
>> Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
>> It will be pushed if I get no objections before 06/03/20. So please
>> shout if anyone has objections.
>>
>> Also note that after the patch there's a diff of the upstream commit vs the
>> patch applied to the branch. This will indicate if there was any rebasing
>> needed to apply to the stable branch. If there were code changes for rebasing
>> (ie: not only metadata diffs), please double check that the rebase was
>> correctly done.
>>
>> Queued patches are on a temporary branch at:
>> https://github.com/kevintraynor/dpdk-stable-queue
>>
>> This queued commit can be viewed at:
>> https://github.com/kevintraynor/dpdk-stable-
>> queue/commit/6528f3ccc454ceb125b3ebcedda931f8fe9b38f3
>>
>> Thanks.
>>
>> Kevin.
>>
>> ---
>> From 6528f3ccc454ceb125b3ebcedda931f8fe9b38f3 Mon Sep 17 00:00:00 2001
>> From: Adam Dybkowski <adamx.dybkowski at intel.com>
>> Date: Wed, 4 Mar 2020 14:18:35 +0100
>> Subject: [PATCH] common/qat: fix GEN3 marketing name
>>
>> [ upstream commit 9cd9d3e702fba4700539c1a2eddac13dd14ecf70 ]
>>
>> This patch fixes the marketing name of the QAT GEN3 to P5xxx.
>> Updates this name mentioned in the compression PMD as well as
>> in the documentation.
>>
>> Fixes: aa983f03ad2e ("crypto/qat: handle Single Pass Crypto Requests on GEN3")
>> Fixes: a124830a6f00 ("compress/qat: enable dynamic huffman encoding")
>> Fixes: 1f5e4053f9b4 ("common/qat: support GEN3 devices")
>>
>> Signed-off-by: Adam Dybkowski <adamx.dybkowski at intel.com>
>> Acked-by: Fiona Trahe <fiona.trahe at intel.com>
>> ---
>> doc/guides/cryptodevs/qat.rst | 2 +-
>> drivers/compress/qat/qat_comp_pmd.c | 2 +-
>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
>> index 837ed280e6..28cfd82f1c 100644
>> --- a/doc/guides/cryptodevs/qat.rst
>> +++ b/doc/guides/cryptodevs/qat.rst
>> @@ -24,5 +24,5 @@ hardware accelerator devices:
>> * ``Intel QuickAssist Technology C3xxx``
>> * ``Intel QuickAssist Technology D15xx``
>> -* ``Intel QuickAssist Technology C4xxx``
>> +* ``Intel QuickAssist Technology P5xxx``
>>
>>
>> diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c
>> index 139298efe3..eec5f61bb3 100644
>> --- a/drivers/compress/qat/qat_comp_pmd.c
>> +++ b/drivers/compress/qat/qat_comp_pmd.c
>> @@ -491,5 +491,5 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev)
>> }
>> if (qat_pci_dev->qat_dev_gen == QAT_GEN3) {
>> - QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx");
>> + QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx");
>> return 0;
>> }
>> --
>> 2.21.3
>>
>> ---
>> Diff of the applied patch vs upstream commit (please double-check if non-empty:
>> ---
>> --- - 2020-05-28 17:13:00.621270780 +0100
>> +++ 0028-common-qat-fix-GEN3-marketing-name.patch 2020-05-28 17:12:59.089556672
>> +0100
>> @@ -1 +1 @@
>> -From 9cd9d3e702fba4700539c1a2eddac13dd14ecf70 Mon Sep 17 00:00:00 2001
>> +From 6528f3ccc454ceb125b3ebcedda931f8fe9b38f3 Mon Sep 17 00:00:00 2001
>> @@ -5,0 +6,2 @@
>> +[ upstream commit 9cd9d3e702fba4700539c1a2eddac13dd14ecf70 ]
>> +
>> @@ -13 +14,0 @@
>> -Cc: stable at dpdk.org
>> @@ -18,4 +19,3 @@
>> - doc/guides/cryptodevs/qat.rst | 6 +++---
>> - doc/guides/rel_notes/release_19_11.rst | 2 +-
>> - drivers/compress/qat/qat_comp_pmd.c | 2 +-
>> - 3 files changed, 5 insertions(+), 5 deletions(-)
>> + doc/guides/cryptodevs/qat.rst | 2 +-
>> + drivers/compress/qat/qat_comp_pmd.c | 2 +-
>> + 2 files changed, 2 insertions(+), 2 deletions(-)
>> @@ -24 +24 @@
>> -index 06985e3193..1e83ed6267 100644
>> +index 837ed280e6..28cfd82f1c 100644
>> @@ -27,8 +27 @@
>> -@@ -24,5 +24,5 @@ poll mode crypto driver support for the following hardware accelerator
>> devices:
>> - * ``Intel QuickAssist Technology C3xxx``
>> - * ``Intel QuickAssist Technology D15xx``
>> --* ``Intel QuickAssist Technology C4xxx``
>> -+* ``Intel QuickAssist Technology P5xxx``
>> -
>> -
>> -@@ -150,5 +150,5 @@ poll mode crypto driver support for the following hardware accelerator
>> devices:
>> +@@ -24,5 +24,5 @@ hardware accelerator devices:
>> @@ -40,13 +32,0 @@
>> - The QAT ASYM PMD has support for:
>> -@@ -377,5 +377,5 @@ to see the full table)
>> - | Yes | No | No | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 |
>> - +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------
>> +
>> -- | Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 |
>> -+ | Yes | No | No | 3 | P5xxx | p | qat_p5xxx | p5xxx | 18a0 | 1 | 18a1 | 128 |
>> - +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------
>> +
>> -
>> -diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst
>> -index eb05149f8f..0261d28431 100644
>> ---- a/doc/guides/rel_notes/release_19_11.rst
>> -+++ b/doc/guides/rel_notes/release_19_11.rst
>> -@@ -261,5 +261,5 @@ New Features
>> @@ -54,5 +33,0 @@
>> - Added support for Single Pass GCM, available on QAT GEN3 only (Intel
>> -- QuickAssist Technology C4xxx). It is automatically chosen instead of the
>> -+ QuickAssist Technology P5xxx). It is automatically chosen instead of the
>> - classic 2-pass mode when running on QAT GEN3, significantly improving
>> - the performance of AES GCM operations.
>> @@ -60 +35 @@
>> -index 7d4fdf10c2..9a7ed19d76 100644
>> +index 139298efe3..eec5f61bb3 100644
>> @@ -63,2 +38,2 @@
>> -@@ -667,5 +667,5 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
>> - int i = 0;
>> +@@ -491,5 +491,5 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev)
>> + }
>
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