[dpdk-stable] [PATCH v3] examples/vmdq: fix the output of pools/queues

Han, YingyaX yingyax.han at intel.com
Mon Mar 30 04:21:17 CEST 2020


Tested-by: Han,YingyaX <yingyax.han at intel.com>

BRs,
Yingya
-----Original Message-----
From: stable <stable-bounces at dpdk.org> On Behalf Of Li, Xiaoyun
Sent: Monday, March 2, 2020 3:19 PM
To: Jiang, JunyuX <junyux.jiang at intel.com>; dev at dpdk.org
Cc: Yang, Qiming <qiming.yang at intel.com>; stable at dpdk.org
Subject: Re: [dpdk-stable] [PATCH v3] examples/vmdq: fix the output of pools/queues

Hi
> -----Original Message-----
> From: Jiang, JunyuX
> Sent: Monday, March 2, 2020 14:41
> To: dev at dpdk.org
> Cc: Li, Xiaoyun <xiaoyun.li at intel.com>; Yang, Qiming 
> <qiming.yang at intel.com>; Jiang, JunyuX <junyux.jiang at intel.com>; 
> stable at dpdk.org
> Subject: [PATCH v3] examples/vmdq: fix the output of pools/queues
> 
> To match the pools/queues configuration, the pools/queues output 
> should start from VMDQ base queue. This patch fixed the issue.
> 
> Fixes: 6bb97df521aa ("examples/vmdq: new app")
> Cc: stable at dpdk.org
> 
> Signed-off-by: Junyu Jiang <junyux.jiang at intel.com>
> ---
>  examples/vmdq/main.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/examples/vmdq/main.c b/examples/vmdq/main.c index
> 011110920..5ab3427c0 100644
> --- a/examples/vmdq/main.c
> +++ b/examples/vmdq/main.c
> @@ -441,10 +441,11 @@ update_mac_address(struct rte_mbuf *m, unsigned
> dst_port)  static void  sighup_handler(int signum)  {
> -	unsigned q;
> -	for (q = 0; q < num_queues; q++) {
> -		if (q % (num_queues/num_pools) == 0)
> -			printf("\nPool %u: ", q/(num_queues/num_pools));
> +	unsigned int q = vmdq_queue_base;
> +	for (; q < num_queues; q++) {
> +		if ((q - vmdq_queue_base) % (num_vmdq_queues / num_pools)
> == 0)
> +			printf("\nPool %u: ", (q - vmdq_queue_base) /
> +			       (num_vmdq_queues / num_pools));
>  		printf("%lu ", rxPackets[q]);
>  	}
>  	printf("\nFinished handling signal %d\n", signum);
> --
> 2.17.1

Acked-by: Xiaoyun Li <Xiaoyun.li at intel.com>


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