[dpdk-stable] patch 'net/mlx5: fix match on empty VLAN item in DV mode' has been queued to stable release 19.11.3
luca.boccassi at gmail.com
luca.boccassi at gmail.com
Tue May 19 15:05:42 CEST 2020
Hi,
FYI, your patch has been queued to stable release 19.11.3
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 05/21/20. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Thanks.
Luca Boccassi
---
>From 23e2c36fa119fc89e02a6645f048699a5a0dee1e Mon Sep 17 00:00:00 2001
From: Dekel Peled <dekelp at mellanox.com>
Date: Tue, 5 May 2020 15:57:54 +0300
Subject: [PATCH] net/mlx5: fix match on empty VLAN item in DV mode
[ upstream commit 92818d839e8eb0ce479db826f00aa6d62384fc92 ]
In existing implementation, using wild card VLAN item is not allowed.
A VLAN item in flow pattern must include VLAN ID (vid) value.
This obligation contradict the flow API specification [1].
This patch updates the VLAN item validation and translation, to allow
wild card VLAN item, without VLAN ID value.
User guide and release notes are updated accordingly.
[1]
commit 40513808b165 ("doc: refine ethernet and VLAN flow rule items")
Fixes: 00f75a40576b ("net/mlx5: fix VLAN match for DV mode")
Signed-off-by: Dekel Peled <dekelp at mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at mellanox.com>
---
doc/guides/nics/mlx5.rst | 18 +++++
drivers/net/mlx5/mlx5_flow_dv.c | 116 ++++++++++++++++++++++++++------
2 files changed, 115 insertions(+), 19 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 261002621c..75f58e6027 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -123,6 +123,24 @@ Limitations
Will match any ipv4 packet (VLAN included).
+- When using DV flow engine (``dv_flow_en`` = 1), flow pattern without VLAN item
+ will match untagged packets only.
+ The flow rule::
+
+ flow create 0 ingress pattern eth / ipv4 / end ...
+
+ Will match untagged packets only.
+ The flow rule::
+
+ flow create 0 ingress pattern eth / vlan / ipv4 / end ...
+
+ Will match tagged packets only, with any VLAN ID value.
+ The flow rule::
+
+ flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
+
+ Will only match tagged packets with VLAN ID 3.
+
- VLAN pop offload command:
- Flow rules having a VLAN pop offload command as one of their actions and
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 5b6d78c86e..9233853e1d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1555,6 +1555,79 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
return 0;
}
+/**
+ * Validate VLAN item.
+ *
+ * @param[in] item
+ * Item specification.
+ * @param[in] item_flags
+ * Bit-fields that holds the items detected until now.
+ * @param[in] dev
+ * Ethernet device flow is being created on.
+ * @param[out] error
+ * Pointer to error structure.
+ *
+ * @return
+ * 0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+static int
+flow_dv_validate_item_vlan(const struct rte_flow_item *item,
+ uint64_t item_flags,
+ struct rte_eth_dev *dev,
+ struct rte_flow_error *error)
+{
+ const struct rte_flow_item_vlan *mask = item->mask;
+ const struct rte_flow_item_vlan nic_mask = {
+ .tci = RTE_BE16(UINT16_MAX),
+ .inner_type = RTE_BE16(UINT16_MAX),
+ };
+ const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
+ int ret;
+ const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
+ MLX5_FLOW_LAYER_INNER_L4) :
+ (MLX5_FLOW_LAYER_OUTER_L3 |
+ MLX5_FLOW_LAYER_OUTER_L4);
+ const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
+ MLX5_FLOW_LAYER_OUTER_VLAN;
+
+ if (item_flags & vlanm)
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "multiple VLAN layers not supported");
+ else if ((item_flags & l34m) != 0)
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "VLAN cannot follow L3/L4 layer");
+ if (!mask)
+ mask = &rte_flow_item_vlan_mask;
+ ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
+ (const uint8_t *)&nic_mask,
+ sizeof(struct rte_flow_item_vlan),
+ error);
+ if (ret)
+ return ret;
+ if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
+ struct mlx5_priv *priv = dev->data->dev_private;
+
+ if (priv->vmwa_context) {
+ /*
+ * Non-NULL context means we have a virtual machine
+ * and SR-IOV enabled, we have to create VLAN interface
+ * to make hypervisor to setup E-Switch vport
+ * context correctly. We avoid creating the multiple
+ * VLAN interfaces, so we cannot support VLAN tag mask.
+ */
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ item,
+ "VLAN tag mask is not"
+ " supported in virtual"
+ " environment");
+ }
+ }
+ return 0;
+}
+
/**
* Validate the pop VLAN action.
*
@@ -4437,8 +4510,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
}
break;
case RTE_FLOW_ITEM_TYPE_VLAN:
- ret = mlx5_flow_validate_item_vlan(items, item_flags,
- dev, error);
+ ret = flow_dv_validate_item_vlan(items, item_flags,
+ dev, error);
if (ret < 0)
return ret;
last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
@@ -5264,29 +5337,34 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
uint16_t tci_m;
uint16_t tci_v;
+ if (inner) {
+ headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
+ inner_headers);
+ headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
+ } else {
+ headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
+ outer_headers);
+ headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
+ /*
+ * This is workaround, masks are not supported,
+ * and pre-validated.
+ */
+ if (vlan_v)
+ dev_flow->dv.vf_vlan.tag =
+ rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
+ }
+ /*
+ * When VLAN item exists in flow, mark packet as tagged,
+ * even if TCI is not specified.
+ */
+ MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
+ MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
if (!vlan_v)
return;
if (!vlan_m)
vlan_m = &rte_flow_item_vlan_mask;
- if (inner) {
- headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
- inner_headers);
- headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
- } else {
- headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
- outer_headers);
- headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
- /*
- * This is workaround, masks are not supported,
- * and pre-validated.
- */
- dev_flow->dv.vf_vlan.tag =
- rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
- }
tci_m = rte_be_to_cpu_16(vlan_m->tci);
tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
- MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
- MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
--
2.20.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2020-05-19 14:04:53.042348058 +0100
+++ 0207-net-mlx5-fix-match-on-empty-VLAN-item-in-DV-mode.patch 2020-05-19 14:04:44.600655334 +0100
@@ -1,8 +1,10 @@
-From 92818d839e8eb0ce479db826f00aa6d62384fc92 Mon Sep 17 00:00:00 2001
+From 23e2c36fa119fc89e02a6645f048699a5a0dee1e Mon Sep 17 00:00:00 2001
From: Dekel Peled <dekelp at mellanox.com>
Date: Tue, 5 May 2020 15:57:54 +0300
Subject: [PATCH] net/mlx5: fix match on empty VLAN item in DV mode
+[ upstream commit 92818d839e8eb0ce479db826f00aa6d62384fc92 ]
+
In existing implementation, using wild card VLAN item is not allowed.
A VLAN item in flow pattern must include VLAN ID (vid) value.
This obligation contradict the flow API specification [1].
@@ -15,21 +17,19 @@
commit 40513808b165 ("doc: refine ethernet and VLAN flow rule items")
Fixes: 00f75a40576b ("net/mlx5: fix VLAN match for DV mode")
-Cc: stable at dpdk.org
Signed-off-by: Dekel Peled <dekelp at mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at mellanox.com>
---
- doc/guides/nics/mlx5.rst | 18 ++++
- doc/guides/rel_notes/release_20_05.rst | 1 +
- drivers/net/mlx5/mlx5_flow_dv.c | 116 +++++++++++++++++++++----
- 3 files changed, 116 insertions(+), 19 deletions(-)
+ doc/guides/nics/mlx5.rst | 18 +++++
+ drivers/net/mlx5/mlx5_flow_dv.c | 116 ++++++++++++++++++++++++++------
+ 2 files changed, 115 insertions(+), 19 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
-index c4bc77c0b6..07f5a3bccd 100644
+index 261002621c..75f58e6027 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
-@@ -127,6 +127,24 @@ Limitations
+@@ -123,6 +123,24 @@ Limitations
Will match any ipv4 packet (VLAN included).
@@ -54,23 +54,11 @@
- VLAN pop offload command:
- Flow rules having a VLAN pop offload command as one of their actions and
-diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
-index 32ca4fa869..281feb0ead 100644
---- a/doc/guides/rel_notes/release_20_05.rst
-+++ b/doc/guides/rel_notes/release_20_05.rst
-@@ -146,6 +146,7 @@ New Features
- * Removed flow rules caching for memory saving and compliance with ethdev API.
- * Optimized the memory consumption of flow.
- * Added support for flow aging based on hardware counter.
-+ * Added support for flow pattern with wildcard VLAN item (without VID value).
-
- * **Added Chacha20-Poly1305 algorithm to Cryptodev API.**
-
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
-index aa5c353a3b..5a0bb9d789 100644
+index 5b6d78c86e..9233853e1d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
-@@ -1639,6 +1639,79 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
+@@ -1555,6 +1555,79 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
return 0;
}
@@ -148,9 +136,9 @@
+}
+
/**
- * Validate GTP item.
+ * Validate the pop VLAN action.
*
-@@ -4818,8 +4891,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+@@ -4437,8 +4510,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
}
break;
case RTE_FLOW_ITEM_TYPE_VLAN:
@@ -161,7 +149,7 @@
if (ret < 0)
return ret;
last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
-@@ -5754,29 +5827,34 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
+@@ -5264,29 +5337,34 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
uint16_t tci_m;
uint16_t tci_v;
@@ -178,7 +166,7 @@
+ * and pre-validated.
+ */
+ if (vlan_v)
-+ dev_flow->handle->vf_vlan.tag =
++ dev_flow->dv.vf_vlan.tag =
+ rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
+ }
+ /*
@@ -203,7 +191,7 @@
- * This is workaround, masks are not supported,
- * and pre-validated.
- */
-- dev_flow->handle->vf_vlan.tag =
+- dev_flow->dv.vf_vlan.tag =
- rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
- }
tci_m = rte_be_to_cpu_16(vlan_m->tci);
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