[dpdk-stable] [PATCH v2] common/mlx5: split relaxed ordering set for read and write

[Thomas Monjalon]

03/11/2020 10:15, Matan Azrad:
> From: Tal Shnaiderman
> > The current DevX implementation of the relaxed ordering feature is enabling
> > relaxed ordering usage only if both relaxed ordering read AND write are
> > supported.  In that case both relaxed ordering read and write are activated.
> > 
> > This commit will optimize the usage of relaxed ordering by enabling it when
> > the read OR write features are supported.  Each relaxed ordering type will be
> > activated according to its own capability bit.
> > 
> > This will align the DevX flow with the verbs implementation of ibv_reg_mr
> > when using the flag IBV_ACCESS_RELAXED_ORDERING
> > 
> > Fixes: 53ac93f71ad1 ("net/mlx5: create relaxed ordering memory regions")
> > Cc: stable at dpdk.org
> > 
> > Signed-off-by: Tal Shnaiderman <talshn at nvidia.com>
> Acked-by: Matan Azrad <matan at nvidia.com>

Applied, thanks

Note: adding "PCI" to distinguish from memory relaxed ordering.