[dpdk-stable] patch 'eal/arm: fix clang build of native target' has been queued to stable release 19.11.6

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 19.11.6

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/19/20. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable

This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/0a45b22ec2e68dde4f5493b44ea964f09a69d2ac

Thanks.

Luca Boccassi

---
>From 0a45b22ec2e68dde4f5493b44ea964f09a69d2ac Mon Sep 17 00:00:00 2001
From: Ruifeng Wang <ruifeng.wang at arm.com>
Date: Thu, 12 Nov 2020 18:31:57 +0800
Subject: [PATCH] eal/arm: fix clang build of native target

[ upstream commit 8fce34cd0a6a55c965c222ab4de37615dea63621 ]

When doing Clang build with '-mcpu=native' on N1 platform, build failed
with:
../lib/librte_eal/arm/include/rte_atomic_64.h:76:39:
	error: instruction requires: lse
__ATOMIC128_CAS_OP(__cas_128_release, "caspl")

This is because native detection for Neoverse N1 was added in Clang-11.
Prior version of Clang's assembler doesn't know LSE support on hardware.
Fixed this for Clang earlier than version 11 by specifying architecture
for assembler.
Referred to [1] for this fix.

Fixes: 7e2c3e17fe2c ("eal/arm64: add 128-bit atomic compare exchange")

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e0d5896bd356cd577f9710a02d7a474cdf58426b

Signed-off-by: Ruifeng Wang <ruifeng.wang at arm.com>
Reviewed-by: Jerin Jacob <jerinj at marvell.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli at arm.com>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index 859ae129d8..07d0ce91d8 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -47,6 +47,8 @@ extern "C" {
 /*------------------------ 128 bit atomic operations -------------------------*/
 
 #if defined(__ARM_FEATURE_ATOMICS) || defined(RTE_ARM_FEATURE_ATOMICS)
+#define __LSE_PREAMBLE	".arch armv8-a+lse\n"
+
 #define __ATOMIC128_CAS_OP(cas_op_name, op_string)                          \
 static __rte_noinline rte_int128_t                                          \
 cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated)      \
@@ -60,6 +62,7 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated)      \
 	register uint64_t x2 __asm("x2") = (uint64_t)updated.val[0];        \
 	register uint64_t x3 __asm("x3") = (uint64_t)updated.val[1];        \
 	asm volatile(                                                       \
+		__LSE_PREAMBLE						    \
 		op_string " %[old0], %[old1], %[upd0], %[upd1], [%[dst]]"   \
 		: [old0] "+r" (x0),                                         \
 		[old1] "+r" (x1)                                            \
@@ -77,6 +80,7 @@ __ATOMIC128_CAS_OP(__cas_128_acquire, "caspa")
 __ATOMIC128_CAS_OP(__cas_128_release, "caspl")
 __ATOMIC128_CAS_OP(__cas_128_acq_rel, "caspal")
 
+#undef __LSE_PREAMBLE
 #undef __ATOMIC128_CAS_OP
 
 #endif
-- 
2.27.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2020-11-17 11:13:13.246655084 +0000
+++ 0006-eal-arm-fix-clang-build-of-native-target.patch	2020-11-17 11:13:12.869115562 +0000
@@ -1 +1 @@
-From 8fce34cd0a6a55c965c222ab4de37615dea63621 Mon Sep 17 00:00:00 2001
+From 0a45b22ec2e68dde4f5493b44ea964f09a69d2ac Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 8fce34cd0a6a55c965c222ab4de37615dea63621 ]
+
@@ -19 +20,0 @@
-Cc: stable at dpdk.org
@@ -27 +28 @@
- lib/librte_eal/arm/include/rte_atomic_64.h | 4 ++++
+ lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 4 ++++
@@ -30,5 +31,5 @@
-diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/librte_eal/arm/include/rte_atomic_64.h
-index 2cef88629c..7fcd174661 100644
---- a/lib/librte_eal/arm/include/rte_atomic_64.h
-+++ b/lib/librte_eal/arm/include/rte_atomic_64.h
-@@ -46,6 +46,8 @@ rte_atomic_thread_fence(int memorder)
+diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+index 859ae129d8..07d0ce91d8 100644
+--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
++++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+@@ -47,6 +47,8 @@ extern "C" {
@@ -43 +44 @@
-@@ -59,6 +61,7 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated)      \
+@@ -60,6 +62,7 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated)      \
@@ -51 +52 @@
-@@ -76,6 +79,7 @@ __ATOMIC128_CAS_OP(__cas_128_acquire, "caspa")
+@@ -77,6 +80,7 @@ __ATOMIC128_CAS_OP(__cas_128_acquire, "caspa")