[dpdk-stable] [PATCH 3/4] net/mlx5: fix event queue number query

[Matan Azrad]

When a Rx\Tx queue is created by DevX, its CQ configuration should
include the EQ number of the interrupts.
The EQ is managed by the kernel and there is a glue API in order to
query the EQ number from the kernel.
The EQ query API gets a vector number specifies the kernel vector of
the interrupt handling.

The vector number was wrongly detected according to the configuration
CPU instead of using the device attributes of the supported vectors.
The CPU was wrongly detected by the rte_lcore_to_cpu_id API without any
check, and in case of non-EAL thread context the value was 0xFFFFFFFF
which caused a failure in the EQ number query API.

Use vector 0 for each EQ number query which must be supported by the
kernel.

Fixes: 08d1838f645a ("net/mlx5: implement CQ for Rx using DevX API")
Fixes: d133f4cdb706 ("net/mlx5: create clock queue for packet pacing")
Cc: stable at dpdk.org

Signed-off-by: Matan Azrad <matan at nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
---
 drivers/net/mlx5/mlx5.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 44822ad..f1e3579 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -947,10 +947,8 @@ struct mlx5_dev_ctx_shared *
 		goto error;
 	}
 	if (sh->devx) {
-		uint32_t lcore = (uint32_t)rte_lcore_to_cpu_id(-1);
-
 		/* Query the EQN for this core. */
-		err = mlx5_glue->devx_query_eqn(sh->ctx, lcore, &sh->eqn);
+		err = mlx5_glue->devx_query_eqn(sh->ctx, 0, &sh->eqn);
 		if (err) {
 			rte_errno = errno;
 			DRV_LOG(ERR, "Failed to query event queue number %d.",
-- 
1.8.3.1