[dpdk-stable] patch 'eal/arm: fix debug build with gcc for 128-bit atomics' has been queued to stable release 19.11.7
Christian Ehrhardt
christian.ehrhardt at canonical.com
Thu Feb 4 12:28:57 CET 2021
Hi,
FYI, your patch has been queued to stable release 19.11.7
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/06/21. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/cpaelzer/dpdk-stable-queue
This queued commit can be viewed at:
https://github.com/cpaelzer/dpdk-stable-queue/commit/81d34ab59c67229f961d8d688ddaa690f5867110
Thanks.
Christian Ehrhardt <christian.ehrhardt at canonical.com>
---
>From 81d34ab59c67229f961d8d688ddaa690f5867110 Mon Sep 17 00:00:00 2001
From: Joyce Kong <joyce.kong at arm.com>
Date: Fri, 15 Jan 2021 17:58:21 +0800
Subject: [PATCH] eal/arm: fix debug build with gcc for 128-bit atomics
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[ upstream commit 36d406c5139fa0160a1d3686f5b2413a2f9ee83b ]
Compiling with "meson build -Dbuildtype=debug --cross-file
config/arm/arm64_thunderx2_linux_gcc" shows the warnings
"function returns an aggregate [-Waggregate-return]":
../../dpdk/lib/librte_eal/arm/include/rte_atomic_64.h: In
function ‘__cas_128_relaxed’:
../../dpdk/lib/librte_eal/arm/include/rte_atomic_64.h:81:20:
error: function returns an aggregate [-Werror=aggregate-return]
__ATOMIC128_CAS_OP(__cas_128_relaxed, "casp")
^~~~~~~~~~~~~~~~~
Fix the compiling issue by defining __ATOMIC128_CAS_OP as a void
function and passing the address pointer into it.
Fixes: 7e2c3e17fe2c ("eal/arm64: add 128-bit atomic compare exchange")
Signed-off-by: Joyce Kong <joyce.kong at arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang at arm.com>
Acked-by: Jerin Jacob <jerinj at marvell.com>
---
.../common/include/arch/arm/rte_atomic_64.h | 28 +++++++++----------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index 8da989dcca..3384934afa 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -54,15 +54,15 @@ extern "C" {
#endif
#define __ATOMIC128_CAS_OP(cas_op_name, op_string) \
-static __rte_noinline rte_int128_t \
-cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated) \
+static __rte_noinline void \
+cas_op_name(rte_int128_t *dst, rte_int128_t *old, rte_int128_t updated) \
{ \
/* caspX instructions register pair must start from even-numbered
* register at operand 1.
* So, specify registers for local variables here.
*/ \
- register uint64_t x0 __asm("x0") = (uint64_t)old.val[0]; \
- register uint64_t x1 __asm("x1") = (uint64_t)old.val[1]; \
+ register uint64_t x0 __asm("x0") = (uint64_t)old->val[0]; \
+ register uint64_t x1 __asm("x1") = (uint64_t)old->val[1]; \
register uint64_t x2 __asm("x2") = (uint64_t)updated.val[0]; \
register uint64_t x3 __asm("x3") = (uint64_t)updated.val[1]; \
asm volatile( \
@@ -74,9 +74,8 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated) \
[upd1] "r" (x3), \
[dst] "r" (dst) \
: "memory"); \
- old.val[0] = x0; \
- old.val[1] = x1; \
- return old; \
+ old->val[0] = x0; \
+ old->val[1] = x1; \
}
__ATOMIC128_CAS_OP(__cas_128_relaxed, "casp")
@@ -114,13 +113,14 @@ rte_atomic128_cmp_exchange(rte_int128_t *dst, rte_int128_t *exp,
#if defined(__ARM_FEATURE_ATOMICS) || defined(RTE_ARM_FEATURE_ATOMICS)
if (success == __ATOMIC_RELAXED)
- old = __cas_128_relaxed(dst, expected, desired);
+ __cas_128_relaxed(dst, exp, desired);
else if (success == __ATOMIC_ACQUIRE)
- old = __cas_128_acquire(dst, expected, desired);
+ __cas_128_acquire(dst, exp, desired);
else if (success == __ATOMIC_RELEASE)
- old = __cas_128_release(dst, expected, desired);
+ __cas_128_release(dst, exp, desired);
else
- old = __cas_128_acq_rel(dst, expected, desired);
+ __cas_128_acq_rel(dst, exp, desired);
+ old = *exp;
#else
#define __HAS_ACQ(mo) ((mo) != __ATOMIC_RELAXED && (mo) != __ATOMIC_RELEASE)
#define __HAS_RLS(mo) ((mo) == __ATOMIC_RELEASE || (mo) == __ATOMIC_ACQ_REL || \
@@ -184,12 +184,12 @@ rte_atomic128_cmp_exchange(rte_int128_t *dst, rte_int128_t *exp,
#undef __STORE_128
} while (unlikely(ret));
-#endif
- /* Unconditionally updating expected removes an 'if' statement.
- * expected should already be in register if not in the cache.
+ /* Unconditionally updating the value of exp removes an 'if' statement.
+ * The value of exp should already be in register if not in the cache.
*/
*exp = old;
+#endif
return (old.int128 == expected.int128);
}
--
2.30.0
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2021-02-04 12:04:31.454070996 +0100
+++ 0082-eal-arm-fix-debug-build-with-gcc-for-128-bit-atomics.patch 2021-02-04 12:04:28.078789775 +0100
@@ -1 +1 @@
-From 36d406c5139fa0160a1d3686f5b2413a2f9ee83b Mon Sep 17 00:00:00 2001
+From 81d34ab59c67229f961d8d688ddaa690f5867110 Mon Sep 17 00:00:00 2001
@@ -8,0 +9,2 @@
+[ upstream commit 36d406c5139fa0160a1d3686f5b2413a2f9ee83b ]
+
@@ -23 +24,0 @@
-Cc: stable at dpdk.org
@@ -29 +30 @@
- lib/librte_eal/arm/include/rte_atomic_64.h | 28 +++++++++++-----------
+ .../common/include/arch/arm/rte_atomic_64.h | 28 +++++++++----------
@@ -32,5 +33,5 @@
-diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/librte_eal/arm/include/rte_atomic_64.h
-index 467d32a455..fa6f334c0d 100644
---- a/lib/librte_eal/arm/include/rte_atomic_64.h
-+++ b/lib/librte_eal/arm/include/rte_atomic_64.h
-@@ -53,15 +53,15 @@ rte_atomic_thread_fence(int memorder)
+diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+index 8da989dcca..3384934afa 100644
+--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
++++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+@@ -54,15 +54,15 @@ extern "C" {
@@ -56 +57 @@
-@@ -73,9 +73,8 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated) \
+@@ -74,9 +74,8 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated) \
@@ -68 +69 @@
-@@ -113,13 +112,14 @@ rte_atomic128_cmp_exchange(rte_int128_t *dst, rte_int128_t *exp,
+@@ -114,13 +113,14 @@ rte_atomic128_cmp_exchange(rte_int128_t *dst, rte_int128_t *exp,
@@ -87 +88 @@
-@@ -183,12 +183,12 @@ rte_atomic128_cmp_exchange(rte_int128_t *dst, rte_int128_t *exp,
+@@ -184,12 +184,12 @@ rte_atomic128_cmp_exchange(rte_int128_t *dst, rte_int128_t *exp,
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