[dpdk-stable] patch 'common/octeontx2: fix build with SVE' has been queued to stable release 19.11.7

[Christian Ehrhardt]

Hi,

FYI, your patch has been queued to stable release 19.11.7

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/06/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/cpaelzer/dpdk-stable-queue

This queued commit can be viewed at:
https://github.com/cpaelzer/dpdk-stable-queue/commit/4f99d060a3e316d05c676d6e4df86f67d1afb57c

Thanks.

Christian Ehrhardt <christian.ehrhardt at canonical.com>

---
>From 4f99d060a3e316d05c676d6e4df86f67d1afb57c Mon Sep 17 00:00:00 2001
From: Ruifeng Wang <ruifeng.wang at arm.com>
Date: Tue, 12 Jan 2021 02:57:07 +0000
Subject: [PATCH] common/octeontx2: fix build with SVE

[ upstream commit fe558028140662ba8488399714d8fe21281851f0 ]

Building with gcc 10.2 with SVE extension enabled got error:

{standard input}: Assembler messages:
{standard input}:4002: Error: selected processor does not support `mov z3.b,#0'
{standard input}:4003: Error: selected processor does not support `whilelo p1.b,xzr,x7'
{standard input}:4005: Error: selected processor does not support `ld1b z0.b,p1/z,[x8]'
{standard input}:4006: Error: selected processor does not support `whilelo p4.s,wzr,w7'

This is because inline assembly code explicitly resets cpu model to
not have SVE support. Thus SVE instructions generated by compiler
auto vectorization got rejected by assembler.

Added SVE to the cpu model specified by inline assembly for SVE support.
Not replacing the inline assembly with C atomics because the driver relies
on specific LSE instruction to interface to co-processor [1].

Fixes: 8a4f835971f5 ("common/octeontx2: add IO handling APIs")

[1] https://mails.dpdk.org/archives/dev/2021-January/196092.html

Signed-off-by: Ruifeng Wang <ruifeng.wang at arm.com>
Reviewed-by: Jerin Jacob <jerinj at marvell.com>
---
 drivers/common/octeontx2/otx2_io_arm64.h | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/common/octeontx2/otx2_io_arm64.h b/drivers/common/octeontx2/otx2_io_arm64.h
index 7e45329b38..3380c9874f 100644
--- a/drivers/common/octeontx2/otx2_io_arm64.h
+++ b/drivers/common/octeontx2/otx2_io_arm64.h
@@ -21,6 +21,12 @@
 #define otx2_prefetch_store_keep(ptr) ({\
 	asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (ptr)); })
 
+#if defined(__ARM_FEATURE_SVE)
+#define __LSE_PREAMBLE " .cpu  generic+lse+sve\n"
+#else
+#define __LSE_PREAMBLE " .cpu  generic+lse\n"
+#endif
+
 static __rte_always_inline uint64_t
 otx2_atomic64_add_nosync(int64_t incr, int64_t *ptr)
 {
@@ -28,7 +34,7 @@ otx2_atomic64_add_nosync(int64_t incr, int64_t *ptr)
 
 	/* Atomic add with no ordering */
 	asm volatile (
-		".cpu  generic+lse\n"
+		__LSE_PREAMBLE
 		"ldadd %x[i], %x[r], [%[b]]"
 		: [r] "=r" (result), "+m" (*ptr)
 		: [i] "r" (incr), [b] "r" (ptr)
@@ -43,7 +49,7 @@ otx2_atomic64_add_sync(int64_t incr, int64_t *ptr)
 
 	/* Atomic add with ordering */
 	asm volatile (
-		".cpu  generic+lse\n"
+		__LSE_PREAMBLE
 		"ldadda %x[i], %x[r], [%[b]]"
 		: [r] "=r" (result), "+m" (*ptr)
 		: [i] "r" (incr), [b] "r" (ptr)
@@ -57,7 +63,7 @@ otx2_lmt_submit(rte_iova_t io_address)
 	uint64_t result;
 
 	asm volatile (
-		".cpu  generic+lse\n"
+		__LSE_PREAMBLE
 		"ldeor xzr,%x[rf],[%[rs]]" :
 		 [rf] "=r"(result): [rs] "r"(io_address));
 	return result;
@@ -92,4 +98,5 @@ otx2_lmt_mov_seg(void *out, const void *in, const uint16_t segdw)
 		dst128[i] = src128[i];
 }
 
+#undef __LSE_PREAMBLE
 #endif /* _OTX2_IO_ARM64_H_ */
-- 
2.30.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-02-04 12:04:33.274411928 +0100
+++ 0129-common-octeontx2-fix-build-with-SVE.patch	2021-02-04 12:04:28.194789887 +0100
@@ -1 +1 @@
-From fe558028140662ba8488399714d8fe21281851f0 Mon Sep 17 00:00:00 2001
+From 4f99d060a3e316d05c676d6e4df86f67d1afb57c Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit fe558028140662ba8488399714d8fe21281851f0 ]
+
@@ -23 +24,0 @@
-Cc: stable at dpdk.org
@@ -30,2 +31,2 @@
- drivers/common/octeontx2/otx2_io_arm64.h | 15 +++++++++++----
- 1 file changed, 11 insertions(+), 4 deletions(-)
+ drivers/common/octeontx2/otx2_io_arm64.h | 13 ++++++++++---
+ 1 file changed, 10 insertions(+), 3 deletions(-)
@@ -34 +35 @@
-index b5c85d9a6e..34268e3af3 100644
+index 7e45329b38..3380c9874f 100644
@@ -77,10 +78 @@
-@@ -69,7 +75,7 @@ otx2_lmt_submit_release(rte_iova_t io_address)
- 	uint64_t result;
- 
- 	asm volatile (
--		".cpu  generic+lse\n"
-+		__LSE_PREAMBLE
- 		"ldeorl xzr,%x[rf],[%[rs]]" :
- 		 [rf] "=r"(result) : [rs] "r"(io_address));
- 	return result;
-@@ -104,4 +110,5 @@ otx2_lmt_mov_seg(void *out, const void *in, const uint16_t segdw)
+@@ -92,4 +98,5 @@ otx2_lmt_mov_seg(void *out, const void *in, const uint16_t segdw)