[dpdk-stable] patch 'common/mlx5: fix completion queue entry size configuration' has been queued to stable release 20.11.1

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 20.11.1

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/07/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable

This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/c12ce55e812ace1afa69a82f73b1bbef7c0dba41

Thanks.

Luca Boccassi

---
>From c12ce55e812ace1afa69a82f73b1bbef7c0dba41 Mon Sep 17 00:00:00 2001
From: Michael Baum <michaelba at nvidia.com>
Date: Wed, 6 Jan 2021 08:19:23 +0000
Subject: [PATCH] common/mlx5: fix completion queue entry size configuration

[ upstream commit a2521c8f983727449bb776133e98bd4ed7534a47 ]

According to the current data-path implementation in the PMD the CQE
size must follow the cache-line size.
So, the configuration of the CQE size should be depended in
RTE_CACHE_LINE_SIZE.

Wrongly, part of the CQE creations didn't follow it exactly what caused
an incompatibility between HW and SW in the data-path when working in
128B cache-line size systems.

Adjust the rule for any CQE creation.
Remove the cqe_size attribute from the DevX CQ creation command and set
it inside the command translation according to the cache-line size.

Fixes: 79a7e409a2f6 ("common/mlx5: prepare support of packet pacing")
Fixes: 5cd0a83f413e ("common/mlx5: support more fields in DevX CQ create")

Signed-off-by: Michael Baum <michaelba at nvidia.com>
Acked-by: Matan Azrad <matan at nvidia.com>
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 4 ++--
 drivers/common/mlx5/mlx5_devx_cmds.h | 1 -
 drivers/net/mlx5/mlx5_devx.c         | 4 ----
 drivers/net/mlx5/mlx5_txpp.c         | 4 ----
 4 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index 9c1d1883ea..a0277b7cc0 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1558,7 +1558,8 @@ mlx5_devx_cmd_create_cq(void *ctx, struct mlx5_devx_cq_attr *attr)
 	} else {
 		MLX5_SET64(cqc, cqctx, dbr_addr, attr->db_addr);
 	}
-	MLX5_SET(cqc, cqctx, cqe_sz, attr->cqe_size);
+	MLX5_SET(cqc, cqctx, cqe_sz, (RTE_CACHE_LINE_SIZE == 128) ?
+				     MLX5_CQE_SIZE_128B : MLX5_CQE_SIZE_64B);
 	MLX5_SET(cqc, cqctx, cc, attr->use_first_only);
 	MLX5_SET(cqc, cqctx, oi, attr->overrun_ignore);
 	MLX5_SET(cqc, cqctx, log_cq_size, attr->log_cq_size);
@@ -1571,7 +1572,6 @@ mlx5_devx_cmd_create_cq(void *ctx, struct mlx5_devx_cq_attr *attr)
 		 attr->mini_cqe_res_format);
 	MLX5_SET(cqc, cqctx, mini_cqe_res_format_ext,
 		 attr->mini_cqe_res_format_ext);
-	MLX5_SET(cqc, cqctx, cqe_sz, attr->cqe_size);
 	if (attr->q_umem_valid) {
 		MLX5_SET(create_cq_in, in, cq_umem_valid, attr->q_umem_valid);
 		MLX5_SET(create_cq_in, in, cq_umem_id, attr->q_umem_id);
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index 726e9f5192..bddeabf0ea 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -267,7 +267,6 @@ struct mlx5_devx_cq_attr {
 	uint32_t cqe_comp_en:1;
 	uint32_t mini_cqe_res_format:2;
 	uint32_t mini_cqe_res_format_ext:2;
-	uint32_t cqe_size:3;
 	uint32_t log_cq_size:5;
 	uint32_t log_page_size:5;
 	uint32_t uar_page_id;
diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c
index 33213a3df2..0ac403b980 100644
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -486,8 +486,6 @@ mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
 			"Port %u Rx CQE compression is disabled for LRO.",
 			dev->data->port_id);
 	}
-	if (priv->config.cqe_pad)
-		cq_attr.cqe_size = MLX5_CQE_SIZE_128B;
 	log_cqe_n = log2above(cqe_n);
 	cq_size = sizeof(struct mlx5_cqe) * (1 << log_cqe_n);
 	buf = rte_calloc_socket(__func__, 1, cq_size, page_size,
@@ -1262,8 +1260,6 @@ mlx5_txq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
 		DRV_LOG(ERR, "Failed to allocate CQ door-bell.");
 		goto error;
 	}
-	cq_attr.cqe_size = (sizeof(struct mlx5_cqe) == 128) ?
-			    MLX5_CQE_SIZE_128B : MLX5_CQE_SIZE_64B;
 	cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(priv->sh->tx_uar);
 	cq_attr.eqn = priv->sh->eqn;
 	cq_attr.q_umem_valid = 1;
diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c
index 21675ab17a..28afda28cb 100644
--- a/drivers/net/mlx5/mlx5_txpp.c
+++ b/drivers/net/mlx5/mlx5_txpp.c
@@ -275,8 +275,6 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh)
 		goto error;
 	}
 	/* Create completion queue object for Rearm Queue. */
-	cq_attr.cqe_size = (sizeof(struct mlx5_cqe) == 128) ?
-			    MLX5_CQE_SIZE_128B : MLX5_CQE_SIZE_64B;
 	cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar);
 	cq_attr.eqn = sh->eqn;
 	cq_attr.q_umem_valid = 1;
@@ -513,8 +511,6 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh)
 		goto error;
 	}
 	/* Create completion queue object for Clock Queue. */
-	cq_attr.cqe_size = (sizeof(struct mlx5_cqe) == 128) ?
-			    MLX5_CQE_SIZE_128B : MLX5_CQE_SIZE_64B;
 	cq_attr.use_first_only = 1;
 	cq_attr.overrun_ignore = 1;
 	cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar);
-- 
2.29.2

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-02-05 11:18:34.203542683 +0000
+++ 0111-common-mlx5-fix-completion-queue-entry-size-configur.patch	2021-02-05 11:18:28.978694387 +0000
@@ -1 +1 @@
-From a2521c8f983727449bb776133e98bd4ed7534a47 Mon Sep 17 00:00:00 2001
+From c12ce55e812ace1afa69a82f73b1bbef7c0dba41 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit a2521c8f983727449bb776133e98bd4ed7534a47 ]
+
@@ -21 +22,0 @@
-Cc: stable at dpdk.org
@@ -33 +34 @@
-index 3bf5279ff1..6a4d6ee7b2 100644
+index 9c1d1883ea..a0277b7cc0 100644
@@ -36 +37 @@
-@@ -1569,7 +1569,8 @@ mlx5_devx_cmd_create_cq(void *ctx, struct mlx5_devx_cq_attr *attr)
+@@ -1558,7 +1558,8 @@ mlx5_devx_cmd_create_cq(void *ctx, struct mlx5_devx_cq_attr *attr)
@@ -46 +47 @@
-@@ -1582,7 +1583,6 @@ mlx5_devx_cmd_create_cq(void *ctx, struct mlx5_devx_cq_attr *attr)
+@@ -1571,7 +1572,6 @@ mlx5_devx_cmd_create_cq(void *ctx, struct mlx5_devx_cq_attr *attr)
@@ -55 +56 @@
-index 94e9bbb906..8d993dfad7 100644
+index 726e9f5192..bddeabf0ea 100644
@@ -58 +59 @@
-@@ -277,7 +277,6 @@ struct mlx5_devx_cq_attr {
+@@ -267,7 +267,6 @@ struct mlx5_devx_cq_attr {
@@ -67 +68 @@
-index da3bb784be..5c5bea6fd8 100644
+index 33213a3df2..0ac403b980 100644
@@ -89 +90 @@
-index 726bdc6ae1..e998de34b2 100644
+index 21675ab17a..28afda28cb 100644
@@ -92 +93 @@
-@@ -278,8 +278,6 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh)
+@@ -275,8 +275,6 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh)
@@ -101 +102 @@
-@@ -516,8 +514,6 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh)
+@@ -513,8 +511,6 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh)