[dpdk-stable] patch 'vdpa/mlx5: fix large VM memory region registration' has been queued to stable release 20.11.4

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 20.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/12/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk

This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/6f7c9fde7173f84c2a245acac1b71bf941b217f8

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 6f7c9fde7173f84c2a245acac1b71bf941b217f8 Mon Sep 17 00:00:00 2001
From: Xueming Li <xuemingl at nvidia.com>
Date: Thu, 23 Sep 2021 16:11:22 +0800
Subject: [PATCH] vdpa/mlx5: fix large VM memory region registration
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 6e914454d5083046497bbd764ff5ae1547e8c6b1 ]

When VM size is larger than 4G (u32) and memory region is larger than 4G,
the 32-bit GCD function overflowed and returned wrong value
that resulted in memory registration failure.

This patch calls 64-bit GCD function to avoid overflow.

Fixes: cc07a42da250 ("vdpa/mlx5: prepare memory regions")

Signed-off-by: Xueming Li <xuemingl at nvidia.com>
Reviewed-by: Matan Azrad <matan at nvidia.com>
---
 drivers/vdpa/mlx5/mlx5_vdpa_mem.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_mem.c b/drivers/vdpa/mlx5/mlx5_vdpa_mem.c
index f8861d5d26..c5ab652a6b 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa_mem.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa_mem.c
@@ -103,15 +103,15 @@ mlx5_vdpa_vhost_mem_regions_prepare(int vid, uint8_t *mode, uint64_t *mem_size,
 			size = mem->regions[i].guest_phys_addr -
 				(mem->regions[i - 1].guest_phys_addr +
 				 mem->regions[i - 1].size);
-			*gcd = rte_get_gcd(*gcd, size);
+			*gcd = rte_get_gcd64(*gcd, size);
 			klm_entries_num += KLM_NUM_MAX_ALIGN(size);
 		}
 		size = mem->regions[i].size;
-		*gcd = rte_get_gcd(*gcd, size);
+		*gcd = rte_get_gcd64(*gcd, size);
 		klm_entries_num += KLM_NUM_MAX_ALIGN(size);
 	}
 	if (*gcd > MLX5_MAX_KLM_BYTE_COUNT)
-		*gcd = rte_get_gcd(*gcd, MLX5_MAX_KLM_BYTE_COUNT);
+		*gcd = rte_get_gcd64(*gcd, MLX5_MAX_KLM_BYTE_COUNT);
 	if (!RTE_IS_POWER_OF_2(*gcd)) {
 		uint64_t candidate_gcd = rte_align64prevpow2(*gcd);
 
-- 
2.33.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-11-10 14:17:05.060201766 +0800
+++ 0067-vdpa-mlx5-fix-large-VM-memory-region-registration.patch	2021-11-10 14:17:01.824079806 +0800
@@ -1 +1 @@
-From 6e914454d5083046497bbd764ff5ae1547e8c6b1 Mon Sep 17 00:00:00 2001
+From 6f7c9fde7173f84c2a245acac1b71bf941b217f8 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 6e914454d5083046497bbd764ff5ae1547e8c6b1 ]
@@ -13 +15,0 @@
-Cc: stable at dpdk.org
@@ -22 +24 @@
-index 59ce4e891c..a06681b494 100644
+index f8861d5d26..c5ab652a6b 100644